MS_uC / dnd / V08 3- 1 RTC - Real Time Clock Programming Microcontroller CAN – Analog Digital Converter Autumn term 2008 32K Byte Burst Flash 64K or 96K.

Slides:



Advertisements
Similar presentations
Curtis Johnson Process Control Instrumentation Technology, 8e]
Advertisements

Satoshi NARIKAWA NTT (G.8032 Acting Co-editor)
0 - 0.
MULTIPLICATION EQUATIONS 1. SOLVE FOR X 3. WHAT EVER YOU DO TO ONE SIDE YOU HAVE TO DO TO THE OTHER 2. DIVIDE BY THE NUMBER IN FRONT OF THE VARIABLE.
Addition Facts
XFEL 2D Pixel Clock and Control System Train Builder Meeting, DESY 22 October 2009 Martin Postranecky, Matt Warren, Matthew Wing.
Chapter 9 Bootloader.
House of the Future: Network/PC ECE 345 Summer 1999 Ari Pernick, Michael Upham, Matthew Hinterscher Group #5 TA: Purvesh Thakker.
1 IWORID 2002 David San Segundo Bello Design of an interface board for the control and data acquisition of the Medipix2 chip D. San Segundo Bello a,b,
Contents Overview Data Information Frame Format Protocol
Introduction to CAN.
1 The SJA1000 CAN Controller and Linux Driver Cristiano Brudna Universität Ulm Fakultät für Informatik Abteilung Rechnerstrukturen.
Introduction to CANBUS
Figure 12–1 Basic computer block diagram.
1 Operating Systems Input/Output Management. 2 What is the I/O System A collection of devices that different sub- systems of a computer use to communicate.
Module Ethernet Technology Module Ethernet Technology.
CAN © CiA Node 2 Node 3 Node 4 Node n Node 1 Ld Ld = Drop Length Lt Lt = Trunk Length ISO Topology.
© 2009 EMC Corporation. All rights reserved. Direct Attached Storage and Introduction to SCSI Module 2.1.
Control Area Network CAN Developed by Bosch in 1983 as an automotive protocol, it was adopted by the Society of Automotive Engineers (SAE) in As.
© 2007 Cisco Systems, Inc. All rights reserved.Cisco Public 1 ETHERNET Derived From CCNA Network Fundamentals – Chapter 9 EN0129 PC AND NETWORK TECHNOLOGY.
1 © 2004, Cisco Systems, Inc. All rights reserved. CCNA 1 v3.1 Module 1 Introduction to Networking.
FX to FX2: A Comparison. Agenda Block diagram Evolution Hardware Firmware Wrap-up.
Designing Embedded Hardware 01. Introduction of Computer Architecture Yonam Institute of Digital Technology.
Addition 1’s to 20.
Gursharan Singh Tatla PIN DIAGRAM OF 8086 Gursharan Singh Tatla Gursharan Singh Tatla
Week 1.
The ESA MUSIC Project Design of DSP HW and Analog TX/RX ends Advanced Mobile Satellite Systems & Technologies presentation days ESA/ESTEC – November.
Interfacing to the Analog World
AT94 Training 2001Slide 1 FPSLIC- Embedded MCU Core 8 Bit RISC MCU Industry’s Highest 8-bit Performance A Real 8-Bit RISC Architecture Low Power ( idle/power.
24-bit Audio CODEC 數位電路實驗 TA: 吳柏辰 Author: Trumen.
8086 [2] Ahad. Internal! External? 8086 vs _bit Data Bus 20_bit Address 8_bit Data Bus 20_bit Address Only external bus of 8088 is.
Arctic IEC-104 Gateway Jari Lahti, CTO.
CANopen: The physics.
MS_uC / dnd / V RTC - Real Time Clock Programming Microcontroller ADC – Analog Digital Converter Autumn term K Byte Burst Flash 64K or 96K.
MS_uC / dnd / V Programming and GPIO Programming Microcontroller IDE usage, debugger GPIO – General Purpose Input/Output Week 2 - autumn term 2007.
MS_uC / dnd / V TIM - Timer Programming Microcontroller TIM - Timer Autumn term K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte.
MS_uC / dnd / V UART - Serial communic. Programming Microcontroller UART – Universal Asynchronous Receiver Transmitter K Byte Burst Flash.
HT46 A/D Type MCU Series Data Memory (Byte) Program Memory HT46R22 (OTP) HT46C22 (Mask) 2Kx Kx16 4Kx HT46R23 (OTP) HT46C23 (Mask) HT46R24.
MS_uC / dnd / V VIC - Vectored Interrupts Programming Microcontroller VIC – Vectored interrupt controller Autumn term K Byte Burst Flash.
7-1 Digital Serial Input/Output Two basic approaches  Synchronous shared common clock signal all devices synchronised with the shared clock signal data.
MS_uC / dnd / V RTC - Real Time Clock Programming Microcontroller RTC – Real Time Clock Autumn term K Byte Burst Flash 64K or 96K Byte SRAM.
Lecture 27: LM3S9B96 Microcontroller – Inter- Integrated Circuit (I 2 C) Interface.
NS Training Hardware. System Controller Module.
SERIAL BUS COMMUNICATION PROTOCOLS
MSP432™ MCUs Training Part 5: Digital Peripherals
Technology Date 10/17/00, Page 1 Technology s PROFIBUS Technology Chips - Modules - Development Kits.
System Clocks.
Typical Microcontroller Purposes
Universal Asynchronous Receiver/Transmitter (UART)
DEVICES AND COMMUNICATION BUSES FOR DEVICES NETWORK
NS7520.
PCA9557: REMOTE 8-BIT I 2 C AND SMBus LOW- POWER I/O EXPANDER.
Universal Asynchronous Receiver/Transmitter (UART)
ATtiny23131 A SEMINAR ON AVR MICROCONTROLLER ATtiny2313.
Alexei SemenovGeneric Digitizer Generic Digitizer 10MHZ 16 bit 6U VME Board.
Embedded Network Interface (ENI). What is ENI? Embedded Network Interface Originally called DPO (Digital Product Option) card Printer without network.
80386DX functional Block Diagram PIN Description Register set Flags Physical address space Data types.
Refer to Chapter 15 in the reference book
© 2009, Renesas Technology America, Inc., All Rights Reserved 1 Course Introduction  Purpose:  This course provides an overview of the serial communication.
ECE 371 Microprocessor Interfacing
CAN Controller Area Network 29BIT ID
Programming Microcontroller ADC – Analog Digital Converter
Programming Microcontroller
I2C PROTOCOL SPECIFICATION
Programming Microcontroller
Programming Microcontroller GPIO – General Purpose Input/Output
SPI Protocol and DAC Interfacing
I2C Protocol and RTC Interfacing
AVR – ATmega103(ATMEL) Architecture & Summary
ADSP 21065L.
Presentation transcript:

MS_uC / dnd / V RTC - Real Time Clock Programming Microcontroller CAN – Analog Digital Converter Autumn term K Byte Burst Flash 64K or 96K Byte SRAM 256K or 512K Byte Burst Flash OTP Mem UARTI2CSPI TIMRTC EXT. Bus GPIO USB 2.0FS CAN 2.0B Enet MAC PFQ BC DMA INTR Cntl ARM966 E CORE w/DSP 96 MHz CLK Cntl ADC LVD BOD PLL JTAGETM9 STR912FW44

MS_uC / dnd / V RTC - Real Time Clock CAN zIntroduction zCAN Pin assignments zCAN Properties zBus Properties zTransmission rates zSerial data format zBus access zCAN features zCAN diagram zCAN register map zCAN configuration zPin configuration

MS_uC / dnd / V RTC - Real Time Clock zCAN (Controller Area Network) has been developed in 1981 yRobert Bosch GmbH and Intel zCAN was originally planed for the car industry yCAN is also established in the automation and medicinal industry zThe CiA (CAN in Automation) has defined many industrial standards ywww.can ‑ cia.org Introduction

MS_uC / dnd / V RTC - Real Time Clock CAN pin assignments D-Sub male on PC Pin DB9 SymbolText 1-Reserved 2CAN_LCAN_L bus line dominant low 3CAN_GNDCAN Ground 4-Reserved 5(CAN_SHIELD)Optional CAN Shield 6(GND)Optional Ground 7CAN_HCAN_H bus line dominant high 8-Reserved 9(CAN_V+)Optional CAN external power supply Male -> Stecker Female -> Buchse

MS_uC / dnd / V RTC - Real Time Clock CAN Properties Nods number30 Bus length40 until 5000 m, in function of the transmission rate Bus managementSystem Multi-Master, but it can also be used with a Master/Slave architecture Access methodologyCarrier Sense Multiple Access/Collision Avoidance (CSMA/CA) ID priority StandardsCAN 2.0A (11 bit ID) CAN 2.0B (29 bit ID) Transmission ratesmax. 1 M bit/s Bytes transmitted per telegram max. 8 CableTwo cables for the data and identifiers

MS_uC / dnd / V RTC - Real Time Clock BUS properties zThe data are transmitted in a differential way yReduction of the ambiance noise zThe bus contains the following levels yDominant (logical low level) yRecessive (logical high level)

MS_uC / dnd / V RTC - Real Time Clock Transmission rate Transmission rate (Baud) [kBit/s] Maximum length of the network

MS_uC / dnd / V RTC - Real Time Clock Serial data format (logical representation) zSOF: Sart Of Frame zIdent: Identifier zIDE: Identifier Extension Bit zDLC: Data Length Code zData zCRC: Cyclic Redundancy Check zACK: Acknowledge Bit zEOF: End Of Frame zIFS: Inter Frame Space

MS_uC / dnd / V RTC - Real Time Clock CAN Bus Arbitration Method

MS_uC / dnd / V RTC - Real Time Clock CAN features zSupport CAN protocol version 2.0 part A and B zBit rates up to 1 MBits/s z32 Message Objects zEach Message Object has its own identifier mask zProgrammable FIFO zMask able interrupt zDisable Automatic Re-Transmission mode for Timer Triggered CAN applications zProgrammable loop-back mode for test operation zTwo 16-bit module interfaces to the APB bus

MS_uC / dnd / V RTC - Real Time Clock CAN diagram

MS_uC / dnd / V RTC - Real Time Clock CAN register map (1/2)

MS_uC / dnd / V RTC - Real Time Clock CAN register map (2/2)

MS_uC / dnd / V RTC - Real Time Clock CAN Control Register (CAN_CR)

MS_uC / dnd / V RTC - Real Time Clock CAN Status Register (CAN_SR)

MS_uC / dnd / V RTC - Real Time Clock CAN Bit Timing Register (CAN_BTR)

MS_uC / dnd / V RTC - Real Time Clock CAN Configuration (1/2) zConfigure the operating mode  Register: CAN_CR  The library function: CAN_Init  Structure variable member: CAN_ConfigParameters zConfigure the bit rate  Register: CAN_BTR  The library function: CAN_Init  Structure variable member: CAN_Bitrate zConfigure the transmit and receive messages yMessage interface register sets yThe bibliotheca functions  CAN_SetTxMsgObj and CAN_SetRxMsgObj

MS_uC / dnd / V RTC - Real Time Clock CAN Configuration (2/2)

MS_uC / dnd / V RTC - Real Time Clock Pin connections of CAN (1/2) STR91x ARM966 manual pdf, 4.1 pin functions page 36 P5.0 CAN_RX Alternate Input 1 P5.1 CAN_TX Alternate Output 2  Use CAN port of MCBSTR9. Which port?

MS_uC / dnd / V RTC - Real Time Clock Pin Connections of CAN (2/2)