Optical Fiber Communications Technology, Systems and Circuits Overview Lecturer: Ali Fotowat Ahmady Feb 7, 2012 Tabriz University Photonics Conference 4/12/20151Sharif University of Technology

Agenda Why Optical Communications? Broadband Access Technologies FTTx PON Technology GPON: System Overview and Protocol Stack Optical Transceivers – CMOS Optoelectronic Receiver – CMOS CDR and DEMUX IC 4/12/2015Sharif University of Technology2

Traffic Growth and Power Consumption 4/12/2015Sharif University of Technology3

Limitations of Electrical Links Market Transition from Electrical to Optical 4/12/2015Sharif University of Technology4

Progress in Optical Communication Technology (2 of 2) 4/12/2015Sharif University of Technology5

Trend of Broadband Access Studies 4/12/20156 Data speed (bps) 1G 100M 10M 100G 10G Year BaseT GbE 10GbE 40/100GbE B-PON GE-PON G-PON 10G-EPON NG-PON1 Next target STM- PON IEEE802.3 STD ADSL NG-PON2 (WDM TDM Hybrid PON) P-P P-MP FTTH 20 mill. users 10 mill. (+ SCM-PON for video distribution ) P-P: Point to Point P-MP: Point to Multipoint SCM: Subcarrier Modulation NGA: Next Generation Access max. min. Sharif University of Technology

Access: Fiber To The X (FTTx) 4/12/20157 Service Node ONU FTTH FTTB FTTC FTTCab Optical Fiber PON System xDSL OLT ONU NT FTTC: Fiber To The Curb FTTCab : Fiber To The Cabinet FTTH : Fiber To The Home FTTB : Fiber To The Building Operation System Internet Leased Line VOIP PSTN Video Twisted Pair ONT Passive Optical Splitter Sharif University of Technology

FTTX PON: The Critical Components 4/12/20158 Optical Amplifier Optical Fiber Cable ONT WDM Coupler 1490nm 1310nm 1550nm Video TX OLT Splitter 1490nm 1310nm 1550nm Tx Rx Tx Rx Up to 60 km* physical reach (* with G Reach Extender) ONU Access Node NB BB CC E1/DS1 GbE STMn/OCn (and/or) Sharif University of Technology

xPON Comparison 4/12/20159Sharif University of Technology

PON Applications 4/12/ STM1 ONT STM1 ONT STM1 ONT ATM ONT 10/100BT Remote DSLAM/DLC nxT1/E1 ONT E1 ONT 1. FTTP 4. DSLAM Aggregation 2. Cellular Backhaul 3. CATV Multiple System Operator Sharif University of Technology

GPON Equipments 4/12/ GPON OLT GPON ONU GPON ONT Fiber Cable Twisted Pair Electrical or Optical Splitter FTTC FTTH Sharif University of Technology

GPON Equipments 4/12/ GbE GbE GPON PPPoE Optical Splitter ODN Network processing Advanced traffic management functionality GPON Framer Up to 128 OLT 10/100 Base-T ADSL2+/VDSL2 10/100/1000 Base-T 2×POTS WiFi ONU ONT Sharif University of Technology

Optical “Food Chain” 4/12/2015Sharif University of Technology13

Optical Communication Protocol Stack 4/12/2015Sharif University of Technology14

ITU-T Recommendations GPON Protocol Stack and Common Functions 4/12/2015Sharif University of Technology15 Protocol stack for the GTCGPON common functions

GPON GTC Frame Format 4/12/2015Sharif University of Technology16 GTC Layer Framing for Downstream and Upstream Downstream GPON Frame Format

Generic Optical Fiber System 4/12/2015Sharif University of Technology17

4/12/2015Sharif University of Technology18 An 8.5-Gb/s Fully Integrated CMOS Optoelectronic Receiver Using Slope-Detection Adaptive Equalizer, JSCC 2010

Differential n-well Photodiode 4/12/2015Sharif University of Technology19 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE- DETECTION ADAPTIVE EQUALIZER, JSCC 2010 Rectangular n-well diodes are covered by light-blocking metals

Photodiode Responsivity Variation 4/12/2015Sharif University of Technology20 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010 Doping dependency of the photodiode responsivity at 3-dB frequency (5.9 GHz) temperature dependency of the photodiode responsivity

Variation of C PD 4/12/2015Sharif University of Technology21 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010 Doping dependencies of C PD Temperature dependencies of C PD

Block diagram of the proposed adaptive equalizer 4/12/2015Sharif University of Technology22 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

Proposed OEIC Receiver 4/12/2015Sharif University of Technology23 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

Proposed Adaptation Circuit 4/12/2015Sharif University of Technology24 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

Proposed Feedback TIA & DC-Balanced Buffer 4/12/2015Sharif University of Technology25 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

Proposed Equalization Filter Cell 4/12/2015Sharif University of Technology26 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010 Frequency Response Simulated frequency response of the proposed equalization filter cell for various capacitor control voltages

LA First Stage Gain Cell 4/12/2015Sharif University of Technology27 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

LA Second Stage & Replica Bias Circuit 4/12/2015Sharif University of Technology28 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

Temperature Variation 4/12/2015Sharif University of Technology29 Simulated bandwidth of the silicon photodiode and the proposed receiver front-end at various temperatures. LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

Chip microphotograph 4/12/2015Sharif University of Technology30 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

Measurement 4/12/2015Sharif University of Technology31 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

Measured Eye-Diagrams 4/12/2015Sharif University of Technology32 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010 Minimal EqualizationOptimal Equalization

Measured BER of OEIC Receiver 4/12/2015Sharif University of Technology33 LEE et al.: AN 8.5-Gb/s FULLY INTEGRATED CMOS OPTOELECTRONIC RECEIVER USING SLOPE-DETECTION ADAPTIVE EQUALIZER, JSCC 2010

4/12/2015Sharif University of Technology34 A 10-Gb/s CMOS CDR and DEMUX IC With a Quarter- Rate Linear Phase Detector, JSCC 2006

Dual loop architecture for wide frequency acquisition range Full integration of CDR, DEMUX, LVDS, LD, and LOS BYUN et al.: A 10-Gb/s CMOS CDR AND DEMUX IC WITH A QUARTER-RATE LINEAR PHASE DETECTOR,JSCC 2006 System Architecture 4/12/201535Sharif University of Technology

Proposed Quarter-rate Linear PD A 2.5GHz LC-QVCO generates four phase recovered clocks There are 8 phase error pulses  four UP[3:0] pulses four DN[3:0] pulses BYUN et al.: A 10-Gb/s CMOS CDR AND DEMUX IC WITH A QUARTER-RATE LINEAR PHASE DETECTOR,JSCC /12/201536Sharif University of Technology

Proposed Quarter-rate Linear PD UP pulse width = 150ps DN pulse width = 100ps Design issues –Phase error –Duty ratio distortion –Delay matching BYUN et al.: A 10-Gb/s CMOS CDR AND DEMUX IC WITH A QUARTER-RATE LINEAR PHASE DETECTOR,JSCC /12/201537Sharif University of Technology

Trans-conductor Circuit BYUN et al.: A 10-Gb/s CMOS CDR AND DEMUX IC WITH A QUARTER-RATE LINEAR PHASE DETECTOR,JSCC /12/201538Sharif University of Technology

Data Recovery Circuit BYUN et al.: A 10-Gb/s CMOS CDR AND DEMUX IC WITH A QUARTER-RATE LINEAR PHASE DETECTOR,JSCC /12/201539Sharif University of Technology

Lock Detector BYUN et al.: A 10-Gb/s CMOS CDR AND DEMUX IC WITH A QUARTER-RATE LINEAR PHASE DETECTOR,JSCC /12/201540Sharif University of Technology

Die Photo & Performance Summary 0.13  m 1P8M CMOS + UTM, MIM options Die area = 10.2mm 2 including ESD, PAD, and I/O terminations BYUN et al.: A 10-Gb/s CMOS CDR AND DEMUX IC WITH A QUARTER-RATE LINEAR PHASE DETECTOR,JSCC /12/201541Sharif University of Technology

LDD (SB350) 4/12/2015Sharif University of Technology42

TIA (SB360) 4/12/2015Sharif University of Technology43

PA (SB370) 4/12/2015Sharif University of Technology44

TIA/PA (SB380) 4/12/2015Sharif University of Technology45

Question and Answer Thanks for your attention… 4/12/2015Sharif University of Technology46