Present and Future LLRF at SMTF 1/16 Overview of the Present and the Future Status of the LLRF at SMTF & A0 Prepared by Alexander Brandt & Timothy Koeth AB = Alexander Brandt RC = Ruben Carcagno TK = Tim Koeth SS = Stefan Simrock RR = Ron Rechenmacher WK = Waldermar Koprek KR = Kay Rhelich BC = Brian Chase TC = Thomasz Czarski

Present and Future LLRF at SMTF 2/16 Worth mentioning… A0 DOOCS Upgrade TK, RR, KR will hopefully complete upgrade in May/June ‘05 Upgrade Requires: –Wooster root access for KR, RR, (TK?) –New Sun Sparc CPU –New ADC board (for monitoring)

Present and Future LLRF at SMTF 3/16 LLRF Goals: I. DESY Remotely control of SimCon 2.1 Cavity FNAL II.Again install SimCon 2.1 at A0 for local control of 9-cell Cap-Cav 1. III.DESY Remote Control of A0 IV. Provide 2nd system for Cap-Cav 2 test at SMTF SimCon 3.1 (?) V. Provide 3rd system for 3.9 GHz using SimCon 3.1 (?)

Present and Future LLRF at SMTF 4/16 I.DESY Remote Control of SimCon2.1 Cav. Simulator Information Updating too quickly to write about… Lets hear the latest from: –Waldemar, et. DESY –Ron & FNAL

Present and Future LLRF at SMTF 5/16 II.Reestablish Local Control of CC1 with SimCon2.1 Requires: –Development crate to be moved and Installed A0 (RC, RR) –B.Chase’s VectMod needs to be resurrected (BC) –Alexander (?) to set up SimCon2.1 identical to recent March test and debug (AB, RC, RR, TK, BC, etc) Windows or Solaris Control ? – Solaris is pref’d –Scheduling with A0 upgrades (need south cave closed) (A0 & DESY Folks) This should occur approx early to middle May ! (or sooner if TK can play the role of AB)

Present and Future LLRF at SMTF 6/16 What's Presently At A0 SPARC SV Timing ADCs (Control) DSP C-40 DAC ADCs (Monitoring) Function Generator 1.3 VM GHz 1.3GHz 10MHz Linux Wooster Crate Old TTF System based on C-40 DSP 1.3GHz+250kHz sinusoidal LO 10MHz timing

Present and Future LLRF at SMTF 7/16 II. Duplicate SimCon Test Setup March '05 SPARC SV Timing ADCs (Control) DSP C-40 DAC ADCs (Monitoring) Function Generator 1.3 VM GHz 1.3GHz 10MHz Linux Wooster Crate SPARC LPT2VME SimCon 2.1 VM GHz (square-like) Window+Matlab FPGA-system based on Xilinx Virtex 2000 On-board: 2 ADCs, 2 DACs Square-like LO-generation uses Woosters FG and a loose VM Only a few changes made wrt. original setup (removed attenuation at VM output, exchanged drive signal cabling)

Present and Future LLRF at SMTF 8/16 Screen-Shot from March '05

Present and Future LLRF at SMTF 9/16 III. DESY remote control of CC1 with SimCon2.1 Requires: –Solaris Machine properly networked (RR) –Create needed accounts (RR) –MatLab installed (RR) –All VME drivers installed (RR, AB, WK) –Simple switch over from A0 Ops to Remote DESY R&D Q: Control with MatLab or DOOCS interface? Should be able to accomplish during AB’s visit to FNAL early to mid-May as to assist DESY. >>>> BEFORE May 23rd ! <<<<

Present and Future LLRF at SMTF 10/16 III. DESY remote control of CC1 with SimCon2.1 After remote control is established (TC, WK, AB): 1st Need Calibrations (help from persons at FNAL, TK AB etc) –Offset compensation of vector modulator –Loop Gain, Loop Phase –Initial calibration of ADC channels of down converted signal Port our DOOCS readout of the gradient directly to Solaris? We need two values from DOOCS per pulse: –Maximum power from klystron –Maximum gradient during pulse. TEST # 1: feed forward driving at different gradient TEST # 2: feed back & feed forward Other tests before May 23rd ?

Present and Future LLRF at SMTF 11/16 IV. SimCon3.1 for Cap-Cav 2 SMTF test (Oct 05) SMTF TEST (located at Meson Hall) –4.5K operation (possibly 2K) –No Beam Requires: –at least 2nd SimCon2.1 (or SimCom3.1 and some shuffling) in September –New Master Oscillator (FNAL) –New Timing 10(?)MHz timing module (FNAL) –Double balanced mixer (F) or analog multiplier (D) for down conversion ? To be determined

Present and Future LLRF at SMTF 12/16 New Master Oscillator Scheme 3.9GHz 65MHz(IF)x5? 9MHz(timing new)x5 52MHz (ADC clock new)x5 10MHz (timing old)x? 1352MHz(LO)x5 1300MHz(Gun, CC1, CC2,3.9tricks)x5? 1MHz (DAC clock)x5 81MHz (DAC clock, LASER ?)x6 3900MHz (Fundamental Ref)x2 Have a high frequency, low noise reference at 3.9GHz (or 2.6GHz) Derive other frequencies using low noise dividers 2600MHz(opt. Fundamental Ref)x2 (Minimum # of ports)

Present and Future LLRF at SMTF 13/16 V. Proposal for Control of 3.9GHz Cavity VM ~ x 2 1.3GHz 2.6GHz 3.9GHz 1.3GHz FPGA This box looks like a 1.3GHz-system!

Present and Future LLRF at SMTF 14/16 Schedule for SMTF 1.3GHz 3.9GHz Current setup at A0Planed for Meson Area – October 05 Joined in early '06

Present and Future LLRF at SMTF 15/16 Task List Summary - Upgrade A0 DOOCS - Proposed 2 modes of LLRF operation at A0: 1.Local (normal) control, but with upgrade 2.Remote control of CC1 with Dev5 crate (minimal cable switching) -DESY to provide SimCon 3.1 for Oct SMTF test -FNAL to provide MO & 10(?)MHz timing module -DESY to provide modified LLRF & SimCon3.1 for 3.9 GHz operations, -DESY to provide analog multiplier

Present and Future LLRF at SMTF 16/16 “Road Map” Overview Remote Control of CC1 w/ SimCon2.1 (May ’05) AB & WK et. al Upgrade DOOCS for A0 operations (May ’05) SimCon3.1 control of CC2 At SMTF - NO BEAM (Sept ’05) A0 40 MeV Upgrade(Jan ’06) -4 Klystrons (4 LLRF cntrl systems) -Gun, CC1, CC2, 3.9GHz FNAL: new MO & 10MHz Timing card DESY: SimCon 3.1 & Analog Multiplier (Move CC2 to A0) Time 3.9 GHz Cavity Control