ATM Switch Architectures Carey Williamson Department of Computer Science University of Calgary

Introduction ATM switches are categorized based on internal architectural characteristics Example: shared memory switch Two key features of a switch design are the switch fabric and the buffer organization

A Classification Scheme ATM switch designs can be classified as time-division or space-division switches Time-division switches: all cells pass through a common point within the switch en route to their output points, but do so at different times Space-division switches: all cells pass through the switch at the same time, but do so on different paths

Time Division Switches The two most common types of time division switches are the shared memory switch and the shared medium switch

Time Division Switches (Cont’d) Shared memory switch: there is a common internal buffer in the switch, through which all cells pass en route to their output ports Shared medium switch: there is a common bus in the switch, over which all cells must pass en route to their output ports

Shared Memory Switch Dual Ported Memory Input Ports Output Ports

Shared Memory Switch All incoming cells multiplexed into a single stream (common memory) Organized into output queues per output port Cells retrieved sequentially Central controller and memory bandwidth must be very fast (at least N times input port speed)

Shared Medium Switch All incoming cells multiplexed across a common medium (bus) Cells processed one at a time Bus must be very fast (at least N times input port speed)

SHARED-MEDIUM PACKET SWITCH INPUT 1 AF OUTPUT 1 S/P FIFO P/S OUTPUT 2 INPUT 2 S/P AF FIFO P/S TIME DIVISION BUS ... ... ... ... ... ... INPUT N OUTPUT N S/P AF FIFO P/S

Space Division Switches Space division switches provide multiple concurrent paths from the input ports to the output ports Cells coming in on different input ports and heading to different output ports can proceed through the switch simultaneously on these separate paths, without interfering with each other

Space Division Switches There are many examples of space division switches Crossbar switches Multistage interconnection networks (MINs) Banyan, Batcher-Banyan, Benes delta, omega, perfect shuffle Hypercube switches

4 x 4 Crossbar Switch A1 A2 A3 A4 B1 B2 B3 B4

4 x 4 Crossbar Switch A1 A2 A3 A4 B1 B2 B3 B4

4 x 4 Crossbar Switch A1 A2 A3 A4 B1 B2 B3 B4

2 x 2 NETWORK INPUT 0 OUTPUT 0 OUTPUT 1 INPUT 1

2 x 2 NETWORK INPUT 0 OUTPUT 0 OUTPUT 1 INPUT 1

2 x 2 NETWORK INPUT 0 OUTPUT 0 OUTPUT 1 INPUT 1

4 x 4 NETWORK 1 2 3

8 x 8 NETWORK

Summary There is an extensive (and exhausting) set of literature on ATM switch architectures Much of the real research activity took place five or more years ago Most vendors have based their ATM switching products on the well-established “good” designs (e.g., banyan-based or shared memory)