An implementation of IEEE802.11a WLAN system using Subword Parallelism and its Quantization Error Evaluation Zaipeng Xie Muwu Hou Daphne J Franklin.

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Presentation transcript:

An implementation of IEEE802.11a WLAN system using Subword Parallelism and its Quantization Error Evaluation Zaipeng Xie Muwu Hou Daphne J Franklin

Topics Covered Motivation IEEE a Standard OFDM System  Transmitter  Receiver Quantization Error Analyses Simulation Results Conclusion Future Work

Motivation Increasing demand of greater communication capacity  High bandwidth efficiency Effects of multipath fading and delay alleviated  Frequency selective fading  Narrowband interference Exploit sub-word parallelism to optimize IFFT/FFT implementations

IEEE a Standard Wireless LAN Standard High Data Rates  IEEE b for 2.4GHz Operation  IEEE a for 5GHz Operation Offers three time the operating bandwidth Less susceptible to interference Modulation : BPSK, QPSK, 16-QAM, 64-QAM Coding rate : 1/2, 2/3 and 3/4. Number of subcarriers is 52 OFDM symbol duration : 4

Block Diagram – OFDM System

FFT algorithm A radix-2 Cooley-Tukery FFT, recursive function, O(Nlog(N)) Function Y = fft(N,x) If N==1, Y = x; Else xeven=[x(0)x(2)… x(N-2)]; xodd=[x(1) x(3) … x(N-1)]; Yeven=fft(N/2,xeven); Yodd=fft(N/2,xodd); For k=0:N-1, Y(k)=Yeven(k mod N/2)+W k *Yodd(k mode N/2); end

Quantization Error analysis matlab Fixed point package  6 bit input symbol

Subword Parallelism of FFT C source code: out[k].real = y1.real + ((t.real * y2.real) >> 15) - ((t.imag * y2.imag) >> 15) out[k].imag = y1.imag + ((t.real * y2.imag) >> 15) + ((t.imag * y2.real) >> 15); out[k+N/2].real = y1.real - ((t.real * y2.real) >> 15) + ((t.imag * y2.imag) >> 15); out[k+N/2].imag = y1.imag - ((t.real * y2.imag) >> 15) - ((t.imag * y2.real) >> 15); PLX instructions:  pmulshr, padd, psub, pshift imagrealimagreal t y2 Pmushr.15 imagreal imag excheck Psub.8

BET Evaluation of WLAN system Established an IEEE802.11a WLAN system AWGN channel model Coding Rate ¾ 64 QAM (Quadrature Amplitude Modulation) SNR 10dB Randomly Generated Packet: -number:100 -width: 1 byte Simulate with Different FFT data width - 8, 16, 24, 32, 40, 48, 56 bits

Simulation Result: Raw data BER vs FFT Data Width

Simulation Result: Data BER vs FFT Data Width

Simulation Result: Data PER vs FFT Data Width

Conclusion Better BER and PER performance by increasing the FFT Data Width FFT Data Width represents the size of Complex multiplier, Adder and Subtractor Tradeoff between FFT Processor size and its Performance and possible Optimization

Future Work Finish PLX subword parallelism implementation Evaluate Error Rates vs FFT width in other Modulation mode: BPSK, QPSK, 16-QAM, 64- QAM Evaluate Error Rates vs FFT width with different Coding rate : 1/2, 2/3 and 3/4.

Thanks Questions?