1 © Violin Memory, Inc Product Deep Dive Violin Memory 6000 Series
2 © Violin Memory, Inc MORE APPLICATIONS MORE DEVICES MORE USERS Compute Network Storage Real time, concurrent data access, heavily virtualized infrastructure Multi-Core Compute that is I/O Starved, CPU waiting for I/O Storage Must Deliver High Random IOPS & Low LatencyStorage Must Deliver High Random IOPS & Low Latency More Demand for Data, Now!
3 © Violin Memory, Inc Short stroking Wide striping Adding SSD to legacy array Host side read cache “FAST” “Easy Tier” How Do You Make Storage Go FAST? High Acquisition CostsHigh Acquisition Costs Higher Operational CostsHigher Operational Costs High Acquisition CostsHigh Acquisition Costs Higher Operational CostsHigher Operational Costs
4 © Violin Memory, Inc ALWAYS AVAILABLEAMAZINGLY ECONOMICALINSANELY POWERFUL Best Performance Value Lower Infrastructure Costs Eliminate IO bottlenecks Drastically reduce latency Full Redundancy Built-in Fully Hot Swappable Engineered For Flash Series Flash Array
5 © Violin Memory, Inc Specification VIMM Count & VIMM Capacity24x 512GiB24x 1TiB64x 512GiB64x 1TiB24x 256GiB64x 256GiB Form Factor / Flash type3U / Capacity (MLC)3U / Performance (SLC) Raw Capacity (TiB / TB)12 / 1324 / / 3564 / 706 / / 17.5 Usable Capacity 84% / 65%)6.5 / 513 / 1020 / / 313 / / 7.5 I/O Connectivity8Gb FC, 10GbE iSCSI, 40 Gb IB, PCIe G2 Maximum 4KB IOPS (Mixed)200K IOPS350K IOPS500K IOPS 750K IOPS 450K IOPS1M IOPS Maximum Bandwidth (100% Reads)1.5GB/s2GB/s4GB/s 3GB/s4GB/s Nominal Latency500 µsec (mixed)250 µsec (mixed)
6 © Violin Memory, Inc NO MORE “IO WAIT” 1 Million IOPS, Latency in μsec FAST BY DEFAULT No Tuning Needed Insanely Powerful. YSGet Your Storage on Moore’s Law Curve SUSTAINED EXTREME PERFORMANCE Scale without Fear
7 © Violin Memory, Inc Architecture Fundamentals: Violin Memory OS (vMOS) System Operations -Web, CLI, REST System Management -Storage virtualization -Hardware acceleration -Multi-Level Flash Optimization Data Management -Snapshots, Clones -Thin Provisioning -Encryption -Deduplication* -Replication*
8 © Violin Memory, Inc vMOS – Violin Memory Operating System SYSTEM OPERATIONSSYSTEM MANAGEMENT DATA MANAGEMENT System-wide wear leveling Self-healing, integrated RAID Multi-level wide striping Die and block failure handling Efficient garbage collection LUN Management Multi-Pathing High-Availability Clustering Proactive health monitoring SNMP, CLI, UI, REST API Snapshots Clones Full-disk encryption Thin Provisioning Space management
9 © Violin Memory, Inc Engineered For Performance & Reliability
10 © Violin Memory, Inc Engineered For Performance & Reliability Flash memory fabric -Heart of the system -4x vRAID Control Modules (VCM) Array control modules -Fully redundant -Controls flash memory fabric -System level PCIe switching Active/Active memory gateways -Storage virtualization -LUN configuration IO modules -FC, 10GE, IB, PCIe Interfaces M EMORY G ATEWAYS IO M ODULES F LASH M EMORY F ABRIC 24 to 64 Hot Swappable VIMMs A RRAY C ONTROL M ODULES
11 © Violin Memory, Inc Multi-Level Redundancy – Hot-Swap Anything Fans (x6) Power Supply (x2) VIMM (60+4 hot spares) vRAID Controllers (x4) Array Controllers (x2) Memory Gateways (x2)
12 © Violin Memory, Inc Flash Memory Fabric – Up to 1 Million IOPS Up to 64 Violin Intelligent Memory Modules -PCIe connected -Fully hot swappable -4 global spares 4 Active-Active vRAID Control Modules Fabric level flash optimization -vRAID patented algorithms -Dynamic wear leveling -Multi-level Error Correction Code -Hardware based garbage collection Performance optimization -Dynamic data wide stripping -Flash erase hiding -VIMM failure protection Flash Memory Fabric VCM Memory Gateway
13 © Violin Memory, Inc No SSDs ─ Violin Intelligent Memory Modules Core building block of the Memory Fabric -256 GB SLC Flash -512 GB / 1024 GB MLC Flash -3GB to 8GB DRAM All flash metadata & write I/O buffering Hot Swappable Proprietary flash endurance & wear leveling extending Flash life up to 10x -Continuous data scrubbing -Advanced hardware based ECC -Automated in-place die failure handling
14 © Violin Memory, Inc System Level Automatic Data Placement Optimization By default, each VCM controls 15 VIMMs -3 VIMM Protection Groups -Each comprising 5 VIMMs Data is dynamically placed on VIMMs Example of an incoming 4KB write -Received by MG -Forwarded to a VCM -4KB split in (4*1KB + 1 Parity) writes across 5 VIMMs in a protection group Any VIMM failure triggers activation of a VIMM global spare and vRAID rebuild VCM VIMM VCM VIMM Protection Group P MG 4KB Write
15 © Violin Memory, Inc Every LUN Capable of Up to 1Million IOPS, By Default Full system bandwidth available for every LUN Automatic multi-level striping -Gateways to VCMs -VCM wide striping to VIMMs -VIMM wide striping on internal Flash Chips All operations implemented in hardware, at line speed, ensuring lowest levels of latency VCM
16 © Violin Memory, Inc Low Level Flash Operations Can Lead to Poor I/O Latency Read latency is low Write is 10x to 20x longer than read Erase is 100x longer than read Read OpsWrite OpsErase Ops SLC25µs250µs1,000µs e-MLC50µs1,500µs5,500µs MLC50µs900µs3,000µs Spike free low latency requires special handling of Erase operations
17 © Violin Memory, Inc Write Cliff Affects All Flash Solutions To Some Degree New Write operations get queued behind Erase operations Up to 60% performance drop Real issue is that Erase operations also get in the way of Read operations Mitigating or eliminating the Write Cliff requires special flash management logic Transient Random Write Bandwidth Degradation Source: Nersc “Write Cliff”
18 © Violin Memory, Inc Patented Algorithms Deliver Spike Free Low Latency Background garbage collection ensures free pages for all incoming writes Garbage collection implemented in hardware within each VIMM for line rate performance Garbage collection tightly scheduled & orchestrated at the system level to not affect system performance Garbage collection allowed one VIMM per Protection Group at a time VCM
19 © Violin Memory, Inc Patented Algorithms Deliver Spike Free Low Latency Background garbage collection ensures free pages for all incoming writes Garbage collection implemented in hardware within each VIMM for line rate performance Garbage collection tightly scheduled & orchestrated at the system level to not affect system performance Garbage collection allowed one VIMM per Protection Group at a time VCM
20 © Violin Memory, Inc vRAID Erase Hiding In Action Reads never blocked by garbage collection (vRAID rebuild on remaining 4 VIMMs) System level orchestration enables sustained low latency for mixed workloads VCM P 4KB Read vRAID Rebuild
21 © Violin Memory, Inc World Record Breaking Performance June 29, TPC-E World Record May 9, TPC-C World Record May 23, TPC-C World Record June 22, 2011 – File System World Record December 8, TPC-C World Record September 12, 2012 – VMmark 2.1 World Record September 18, 2012 – VMmark 2.1 World Record September 27, 2012 – TPC-C World Record October 02, 2012 – VMmark 2.1 World Record November 13, 2012 – VMmark 2.1 World Records (5 of them)
22 © Violin Memory, Inc R EDUCE S TORAGE C OSTS BY 7 X C OMPARED TO D ISK Never Overprovision U NMATCHED O PERATIONAL C OST Plug and play experience N EAR I NSTANT ROI Optimize Server and License Costs Amazingly Economical. Reduce Cost Across Your Infrastructure
23 © Violin Memory, Inc Storage Cost Per Application Is What Matters Database Requirements 1TB 20K IOPS & Tier 1 Disk Array - High Performance HDD - $4/Raw GB IOPS per disk - 146GB per disk Violin Memory Flash Memory - $5/Raw GB | $8.5/Usable GB - vRAID - 750k IOPS for any size LUN 1TB 750K IOPS 100 Disks * 146 = 14.6 Raw TB 20K IOPS
24 © Violin Memory, Inc Application Owners Pay 7x Less on Violin Database Requirements 1TB 20K IOPS & Violin Memory 6264 Tier 1 Disk Array Raw TB - $4/Raw GB - 1 Usable TB - $8.5 / Usable GB $58,400 For This Database $8,500 For This Database Application Storage Costs is 7x Lower With Violin!
25 © Violin Memory, Inc Simple Operations Provision storage and Go! -Select LUN capacity and let vRAID automate placement -No tuning required -Hot swap for non disruptive operations Seamlessly handle performance spikes -Customer example: Rogue full table scans in dba scripts System handled the load spikes and still met core application SLAs Advanced Graphical User Interface -Fully customizable dashboard -Detailed performance statistics -Supported as a vCenter Plug-In
Violin Memory Inc. Proprietary 26
Violin Memory Inc. Proprietary 27
28 © Violin Memory, Inc Violin Symphony: Manage PB’s in a Flash! Manage 100’s of Violin flash arrays through a single interface Enable multi-tenancy with role based access control and Smart Groups Share information through custom reports with up to 2 years of historic data Achieve pro-active wellness with advanced health & SLA monitoring Personalize visibility through fully customizable dashboards and gadgets
29 © Violin Memory, Inc Eliminate “I/O Wait”; Reduce HW & SW Costs the Speed of Memory More Ops/Sec With Less CPU Cores More Ops/Sec with Less DRAM Cache Less Software Licenses I/O Wait CPU Cycle with Magnetic Disk: 80% Wait 20% Work t CPU Cycle with Memory Storage: 5% Wait 95% Work t
30 © Violin Memory, Inc VMworld 1 Million IOPS – 2011 vs Engines, 960 drives 1 Million Read IOPS 5 Racks or 210RU – 32,000 Watts 2 Violin 6616 Memory Arrays 1 VM at 1 Million IOPS (Random R/W Mix) 6 RU (97% less) – 3,600 Watts (90% less)
31 © Violin Memory, Inc Bringing the speed of Flash to all your applications T ARGETING A LL A PPLICATIONS Enterprise Applications on Legacy SAN Enterprise Applications on Memory SAN Scale Out Applications D ISRUPTIVE E CONOMICS Reduced Capex Streamlined Opex Ready for Petabyte Scale
32 © Violin Memory, Inc Back-up slides
33 © Violin Memory, Inc Violin 6264: A New Standard in Performance Economics HIGHER EFFICIENCY BETTER ECONOMICS SAME FOOTPRINT DOUBLE CAPACITY Violin 6232Violin X 3X
34 © Violin Memory, Inc Violin 6264 Flash Memory Array at a Glance 50% Lower Power 750K IOPS (Peak 70:30) Memory Disk $/GB 19nm Process Geometry 64 TiBs of Capacity in the Same 3U Form Factor
35 © Violin Memory, Inc Comparing 6264 and 6232 Hardware & Software 6264 requires 250W less than W for 6264 versus 1750W for Result of more power efficient VIMM hardware design 6264 specific hardware improvements -New 1TiB MLC VIMMs -New chassis with better cable management -FC, iSCSI and IB configurations come with a new ACM Internal clustering for vMOS 6 40GE native port – for future use, enabling data movement across arrays -PCIe configuration leverages same ACM as 6232 6264 requires Array Firmware 6.2 and above -Memory Gateway software is equivalent functionality to vMOS 6.0 -Memory Array firmware adds resilience and support for new ACMs and VIMMs vMOS 6.3 will support all 6600 and 6200 Series arrays
36 © Violin Memory, Inc Array Control Module with 40Gbps Ports
37 © Violin Memory, Inc Back panel view – 6264 FC/iSCSI/IB – New ACM