Compiler Construction Sohail Aslam Lecture 44. 2 ExampleExample a = b + c t1 = a * a b = t1 + a c = t1 * b t2 = c + b a = t2 + t2.

Slides:



Advertisements
Similar presentations
Compiler Construction
Advertisements

Slides created by: Professor Ian G. Harris Efficient C Code  Your C program is not exactly what is executed  Machine code is specific to each ucontroller.
Compiler Construction Sohail Aslam Lecture Code Generation  The code generation problem is the task of mapping intermediate code to machine code.
Target Code Generation
1 Lecture 3: MIPS Instruction Set Today’s topic:  More MIPS instructions  Procedure call/return Reminder: Assignment 1 is on the class web-page (due.
Register Allocation CS 320 David Walker (with thanks to Andrew Myers for most of the content of these slides)
1 ARM Movement Instructions u MOV Rd, ; updates N, Z, C Rd = u MVN Rd, ; Rd = 0xF..F EOR.
Code Composer Department of Electrical and Computer Engineering
Run-time Environment for a Program different logical parts of a program during execution stack – automatically allocated variables (local variables, subdivided.
1 CS 201 Compiler Construction Machine Code Generation.
A simple register allocation optimization scheme.
CSI 3120, Implementing subprograms, page 1 Implementing subprograms The environment in block-structured languages The structure of the activation stack.
CS1104 – Computer Organization PART 2: Computer Architecture Lecture 4 Assembly Language Programming 2.
2.3) Example of program execution 1. instruction  B25 8 Op-code B means to change the value of the program counter if the contents of the indicated register.
Lecture 26 Epilogue: Or Everything else you Wanted to Know about Compilers (more accurately Everything else I wanted you to Know) Topics Getreg – Error.
Lecture 11 – Code Generation Eran Yahav 1 Reference: Dragon 8. MCD
Improving code generation. Better code generation requires greater context Over expressions: optimal ordering of subtrees Over basic blocks: Common subexpression.
Lecture 23 Basic Blocks Topics Code Generation Readings: 9 April 17, 2006 CSCE 531 Compiler Construction.
Arithmetic Expression Consider the expression arithmetic expression: (a – b) + ((c + d) + (e * f)) that can be represented as the following tree.
Lecture 25 Generating Code for Basic Blocks Topics Code Generation Readings: April 19, 2006 CSCE 531 Compiler Construction.
Improving Code Generation Honors Compilers April 16 th 2002.
Improving code generation. Better code generation requires greater context Over expressions: optimal ordering of subtrees Over basic blocks: Common subexpression.
1. 2 FUNCTION INLINE FUNCTION DIFFERENCE BETWEEN FUNCTION AND INLINE FUNCTION CONCLUSION 3.
1 Memory Model of A Program, Methods Overview l Memory Model of JVM »Method Area »Heap »Stack.
Segmentation CS 537 – Introduction to Operating Systems.
1 Code Generation Part II Chapter 8 (1 st ed. Ch.9) COP5621 Compiler Construction Copyright Robert van Engelen, Florida State University,
Stack Stack Pointer A stack is a means of storing data that works on a ‘Last in first out’ (LIFO) basis. It reverses the order that data arrives and is.
1 Code Generation Part II Chapter 9 COP5621 Compiler Construction Copyright Robert van Engelen, Florida State University, 2005.
Lecture 4: MIPS Instruction Set
M. Mateen Yaqoob The University of Lahore Spring 2014.
Processes CS 6560: Operating Systems Design. 2 Von Neuman Model Both text (program) and data reside in memory Execution cycle Fetch instruction Decode.
Chapter 7 Object Code Generation. Chapter 7 -- Object Code Generation2  Statements in 3AC are simple enough that it is usually no great problem to map.
COMPILERS CLASS 22/7,23/7. Introduction Compiler: A Compiler is a program that can read a program in one language (Source) and translate it into an equivalent.
Compilers Modern Compiler Design
C Chuen-Liang Chen, NTUCS&IE / 297 CODE GENERATION Chuen-Liang Chen Department of Computer Science and Information Engineering National Taiwan University.
Information Security - 2. Descriptor Tables There are two descriptor tables – Global Descriptor Tables – Local Descriptor Tables The global descriptor.
©SoftMoore ConsultingSlide 1 The CPRL Virtual Machine.
Instructions for test_function
Code Optimization Code produced by compilation algorithms can often be improved (ideally optimized) in terms of run-time speed and the amount of memory.
Overview of Instruction Set Architectures
Chapter 11 Instruction Sets
Microprocessor and Assembly Language
C-language Lecture By B.S.S.Tejesh, S.Neeraja Asst.Prof.
In this lecture Global variables Local variables System stack
Symbolic Instruction and Addressing
The fetch-execute cycle
Code Generation Part I Chapter 9
Programming Languages (CS 550) Mini Language Compiler
Computer Programming Machine and Assembly.
Code Generation Part I Chapter 8 (1st ed. Ch.9)
PA0 is due in 12 hours PA1 will be out in 12 hours
Symbolic Instruction and Addressing
Code Generation Part I Chapter 9
Compiler Construction
Symbolic Instruction and Addressing
THE FETCH-EXECUTE CYCLE.
Data Hazard Example (stall).
TARGET CODE -Next Usage
Compiler Construction
Compiler Construction
Chapter 6 –Symbolic Instruction and Addressing
Code Generation Part II
Instruction Set Summary
Compiler Construction
Compiler Construction
Target Code Generation
THE FETCH-EXECUTE CYCLE.
Programming Languages (CS 360) Mini Language Compiler
(The Stack and Procedures)
Procedures and Macros.
Presentation transcript:

Compiler Construction Sohail Aslam Lecture 44

2 ExampleExample a = b + c t1 = a * a b = t1 + a c = t1 * b t2 = c + b a = t2 + t2

3 live = {b,c} a = b + c live = {a} t1 = a * a live = {a,t1} b = t1 + a live = { b,t1} c = t1 * b live = {b,c} t2 = c + b live = {b,c,t2} a = t2 + t2 live = {a,b,c}

4 Basic Code Generation  Idea: deal with the instructions from beginning to end.  For each instruction, Use registers whenever possible. A non-live value in a register can be discarded, freeing that register.

5 Basic Code Generation  Idea: deal with the instructions from beginning to end.  For each instruction, Use registers whenever possible. A non-live value in a register can be discarded, freeing that register.

6 Basic Code Generation Data Structures: Register descriptor - register status (empty, inuse) and contents (one or more "values") Address descriptor - the location (or locations) where the current value for a variable can be found (register, stack, memory)

7 Basic Code Generation Data Structures: Register descriptor - register status (empty, inuse) and contents (one or more "values") Address descriptor - the location (or locations) where the current value for a variable can be found (register, stack, memory)

8 Instruction type: x = y op z 1.If y is non-live and in register R (alone) then generate OP z’, R (z’ = best location for z)

9 Instruction type: x = y op z 2.If operation is commutative, z is non-live and is in register R (alone), generate OP y’, R (y’ = best location for y)

10 Instruction type: x = y op z 3.If there is a free register R, generate MOV y’, R OP z’, R

11 Instruction type: x := y op z 4.Use a memory location. Generate MOV y’,x OP z’,x

12 Instruction type: x = y op z  Update information about the current best location of x  If x is in a register, update that register’s information (descriptor)

13 Instruction type: x = y op z  If y and/or z are not live after this instruction, update register and address descriptors according.

14 Returning to live Example live = {b,c} a = b + c live = {a} t1 = a * a live = {a,t1} b = t1 + a live = { b,t1} c = t1 * b live = {b,c} t2 = c + b live = {b,c,t2} a = t2 + t2 live = {a,b,c}

15 ExampleExample Initially  three registers: ( -, -, -) all empty  current values: (a,b,c,t1,t2) = (m,m,m, -, -)

16 1: a = b + c, Live = a getreg(): L = R1 MOV b,R1 ADD c,R1 ; R1 := R1 + c Registers: (a, -, -) current values: (R1,m,m, -, -)

17 2: t1 = a * a, Live = a,t1 L = R2 (since a is live) MOV R1,R2 MUL R2,R2 ; R2 = R2* R2 Registers: (a,t1, -) current values: (R1,m,m,R2, -)

18 3: b = t1 + a, Live = b,t1 Since a is not live L = R1 ADD R2,R1 ; R1 = R1+R2 Registers: (b,t1, -) current values: (m,R1,m,R2, -)

19 4: c = t1 * b, Live = b,c Since t1 is not live L = R2 MUL R1,R2 ; R2 = R1*R2 Registers: (b,c, -) current values: (m,R1,R2, -, -)

20 5: t2 = c + b, Live = b,c,t2 L = R3 MOV R2,R3 ADD R1,R3 ; R3 = R1+R2 Registers: (b,c,t2) current values: (m,R1,R2, -,R3)

21 6: a = t2 + t2, Live = a,b,c ADD R3,R3 Registers: (b,c,a) current values: (R3,R1,R2,-,R3)

22 End of block  move all live variables to memory: MOV R3,a MOV R1,b MOV R2,c  all registers available

23 ; a := b + c LOAD b,R1 ADD c,R1 ; R1 := R1 + c ; t1 := a * a MOV R1,R2 MUL R2,R2 ; R2 = R2* R2 ; b := t1 + a ADD R2,R1 ; R1 = R1+R2 ; c := t1 * b MUL R1,R2 ; R2 = R1*R2 ; t2 := c + b MOV R2,R3 ADD R1,R3 ; R3 = R1+R2 ; a := t2 + t2 ADD R3,R3 MOV R3,a; mov live MOV R1,b; var to memory MOV R2,c