October , Chernogolovka 1 Physikalisch-Technische Bundesanstalt, Braunschweig M. Khabipov, D. Balashov, F. Maibaum, A. Zorin Physikalisch-Technische Bundesanstalt, Bundesallee 100, Braunschweig, Germany V. A. Oboznov, V. V. Bolginov, A.N. Rossolenko and V. V. Ryazanov Institute of Solid State Physics, Chernogolovka, Moscow region, Russia The work was supported by DFG (German Science Foundation) through grant ZO124/2-1 and the joint grant of DFG and the Russian Foundation of Basic Researches and grants of the Russian Academy of Sciences. Application of phase shifters in superconducting digital circuits

October , Chernogolovka 2 Outline Introduction Basic principles of Rapid Single Flux Quantum (SFQ) circuits SFQ circuits fabrication technology at PTB Operation of an SFQ circuits with integrated phase shifters based on –superconducting loop with trapped flux quantum –Superconductor-Ferromagnetic-Superconductor  -junction Conclusion Outlook

October , Chernogolovka 3 V I C JJJJ - Josephson junction C – self-capacitance      2 c c 2 0 p 2 ICR2C=ICR2C= Stewart-McCumber parameter VV I IcIc I Return 0 Underdamped JJ Overdamped JJ  C  I VV IcIc I Return  C  0 RSJ model of Josephson tunnel junction R damping resistor

October , Chernogolovka 4 VV I IcIc a short trigger pulse I(t) time “sweep” of the dc I-V curve V(t) Generation of a SFQ pulse (strictly 2  -leap of phase!) Result: I dc bias This pulse (carrier of information) can be used as a trigger pulse for other junctions - the basis of Rapid Single Flux Quantum circuits! (Likharev et al. 1985) Reaction on a short pulse Advantages of RSFQ: quantized information, fast (typically, few ps) switching time, low level of dissipation R a few Ohm

October , Chernogolovka 5 SFQ pulse generation  move to the adjacent minimum  U(  ) = - E J cos  - (  0 /2  )  I +const washboard potential  effect of the trigger pulse! R  Low amplitude signals (noise) not reproduced by the circuit a noise discriminator large damping due to external shunt resistor

October , Chernogolovka 6 Definition of coding in RSFQ logic „0“ „1“ „0“ The binary code: presence (absence) of SFQ pulse between adjacent clock SFQ pulses (for comparison)different voltage levels (CMOS, TTL, “latching” logic) Time, a. u. V/V c clock pulses information pulse

October , Chernogolovka 7 RSFQ dc/SFQ and SFQ/dc converter circuit dc/SFQ converter T-Flipflop with SFQ/dc converter Josephson transmission line Circuit provide generation and back conversion of SFQ pulses into voltage signals V. Kaplunenko et al. IEEE Trans. Magnetics 25, , 1989 K. Likharev and V. Semenov IEEE Trans. Appl. Supercond. 1, 3-28, 1991

October , Chernogolovka 8 RSFQ T-flip-flop circuit Circuit provides a frequency division of SFQ pulses K. Likharev and V. Semenov IEEE Trans. Appl. Supercond., 1, 1991 j c = 100 A/cm 2 operation frequency f = V c /Ф 0 =I c R n /Ф 0 up to 40 GHz power consumption P = V  I bias = 15 nW  As result frequency division ! I bias

October , Chernogolovka 9 T-flip-flop circuit, results of simulation Phase drop, input junction Phase drop, TFF junctions Voltage, input junction Voltage, TFF junction

October , Chernogolovka 10 Frequency division realised in CMOS logic (for comparison) P dyn = C eff V 2 DD x f For example, at 30fF/gate at 100MHz and V DD = 5 V, 75 μW is dissipated per gate UMBC, University in Mariland, Advanced VLSI design The circuit consists of 10 gates and includes about 50 transistors Paul Horowitz, Winfield Hill. The Art of Electronics, Cambridge University Press, Second Edition, 1989

October , Chernogolovka 11 SFQ circuits Nb/Al thin-films fabrication technology established at PTB Shielding of an electromagnetic noise, realization of the low value inductances realization of the shunt and bias current resistors j c between 100 A/cm 2 and 1 kA/ cm 2 -deposition and etching of The Nb ground plane - anodization of the ground plane -deposition of the Nb/AlxOy/Nb trilayer -deposition of a thin SiO 2 layer - deposition and etching of the - deposition of the SiO 2 isolation layer - etching of the contact holes Cr/Pt/Cr resistor trilayer - deposition of the SiO 2 isolation layer

October , Chernogolovka 12 -etching of the thin SiO 2 isolation layer and the Nb counter electrode, definition of JJs -anodization with the thin SiO 2 layer as a mask -etching of the base electrode -deposition and etching of the SiO 2 isolation layer SFQ circuits Nb/Al thin-films fabrication technology established at PTB Smallest junction area A=10 µm 2

October , Chernogolovka 13 Cross-section of shunted Josephson junction in Nb/Al technology Cr/Pt/Cr damping resistor R sq =2Ω/sq. Tunnel barrier Al x O y Thermally oxidized silicon substrate } JJ Si SiO 2 Nb Al 2 O 3 Nb 2 O 5 Cr/Pt/Cr Voltage V A = 24 µm 2 I c  20 µA R n  59 Ω IR IR T = 4.2 K (1mV/div) IV curve of the underdamped JJ R sh   IC IC Current I(20µA/div) IV curve of the overdamped JJ Voltage V (100µV/div) JJ Current I(20µA/div) A = 24 µm 2 I c  24 µA R sh  4 Ω IC IC  C >>1  C ~ 1 T = 4.2 K

October , Chernogolovka 14 Qubit control and read out: low back action on Josephson qubit cells (low value I c, large value of shunt resistor, low power consumption ) Low I c value due to I c x L ~Ф 0 result in proportionally increased value of inductances L, circuits have a large area and became sensitive to an electromagnetic noise Physikalisch-Technische Bundesanstalt, Braunschweig Why we need phase shifting elements in RSFQ?

October , Chernogolovka 15 TFF with RC shunted Josephson junctions. Parameters: j c =100 A/cm 2, I c = 16µA, L=130 pH Conventional TFF with large storing inductance L Symmetry of the TFF states is due to phase drop of about  created by dc control current: Compact phase shifters are required 00  -JJ L Superconducting loop with trapped flux quanta The  shift can also be realized on the basis of HTS junctions exhibiting the d-wave symmetry of the order parameter (see T. Ortlepp et al. Science 312, 1495, 2006) I contr  =  SFS

October , Chernogolovka 16 Superconducting loop with trapped flux quantum as a phase shifting element I shifter   External flux  applied at T > T C Nb (T = 10 K) External flux  turned of when T < T C Nb (liquid helium temperature T = 4.2K). Quantized flux trapped  trapped = n   0  0  2.07 mV  ps (single flux quantum)  trapped = n   0 Flux quantization law The work carried out in collaboration with the group in TU Ilmenau It was proposed as a phase-bias circuit for the Josephson qubit in J.B. Majer et al. APL 80, 3638, T = 10 K T = 4.2 K

October , Chernogolovka 17 Superconducting loop with trapped flux quantum as a phase shifting element The work carried out in collaboration with the group in TU Ilmenau During the cooldown, the flux is trapped in the ground plane hole. Pinning a flux quanta into ground plane hole

October , Chernogolovka 18 Conventional TFF and TFF with integrated π – shifter J4 J3 L shifter J1 J2 TFF input TFF out2 TFF out1 J4 J3 L int J1 J2 TFF input TFF out2TFF out1 Schematic diagram of the ordinary TFF circuit Schematic diagram of the TFF with integrated  -shifter The large quantizing inductance L int can be replaced by passive π – shifter, ensuring bistable functioning of the TFF D. Balashov et al., IEEE Trans. Appl. Supercond. 17, 142, 2007

October , Chernogolovka 19 Simpler circuit: dc-interferometer with integrated π–shifter Microphotograph of the sample Circuit parameters: I C  270 µA, R N  0.8 , L shifter  7 pH (at T=4.2K), and L shifter  15 pH (at T=10K), Flux bias current for single  0 operation mode  I contr  200 µA Control line JJ V out I bias I sweep dc-interferometer with integrated π – shifter J2J1 I bias V out I sweep  -shifter  ++

October , Chernogolovka 20 Experimental testing of the dc-interferometer with integrated π–shifter No flux trapped in the shifter loop I contr  0 µA Voltage-flux characteristics of the dc-interferometer with integrated shifter loop realized in j C =1 kA/cm 2 Nb/Al technology 1  0 trapped in the shifter loop I contr  200 µA V (20 µV/div) Flux  Current I sweep ( 200 µA/div)  0 /2 00   J2J1 I bias V out I sweep Voltage-flux characteristics

October , Chernogolovka 21 TFF circuit with integrated π–shifter Microphotograph of the sample TFF input  -shifter  ++ J4J3 TFF separate bias Control line TFF out-1 TFF out-2 L shifter J1 J2 TFF input TFF out-2TFF out-1 Schematic diagram of the TFF with integrated  -shifter

October , Chernogolovka 22 Block-diagram of tested circuit including TFF with integrated π – shifter TFF with  -shifter should operate as a frequency divider 2:1  -shifter  ++ Control line V_out2 V_out1 (Divider 2:1) I_in

October , Chernogolovka 23 Experimental testing of the circuit with integrated π–shifter Circuit realized in Nb/Al technology with j C =1k A/cm 2 When no flux trapped in the π – shifter loop f out1 = f out2 = f in /2 Bias current margin of the circuit is  20% Voltage (200 µV/div) Current (500 µA/div) Time t ( 5 ms/div) When  0 trapped in the π – shifter loop f out1 = f out2 = f in /4 Bias current margin of the circuit is  17% I _in V_out2 V_out1 V_out2 V_out1  

October , Chernogolovka 24  -junction as a phase inverting element Bulaevsky, Kuzii and Sobyanin, JETP Lett. (1977) 0-junction energy minimum at 0  -junction energy minimum at  I=I c sin[  +  ]= -I c sin  I  I  E  E  0 --  22 22 Josephson current-phase relation π-junction current- phase relation E= E J [1-cos  ] I=I c sin     - JJ Symbolic notation  -- E= E J [1-cos(  +  )]=E J [1+cos  ]

October , Chernogolovka 25 Superconductor-Ferromagnet-Superconductor (SFS) junction: 0-state and π–state  -junction “  ”- state I = I c sin(  +  ) = - I c sin(  ) Nb-Cu 0.47 Ni Nb “0”-state I=I c sin  “0”-state I=I c sin  V. A. Oboznov et al. PRL 96, , 2006 d F = nm

October , Chernogolovka 26 Cross-section of shunted Josephson junction in Nb/Al technology and ferromagnetic based junction SIS-junction j c =100 A/cm 2 A = 10 µm 2 SFS-junction j c =850 A/cm 2 A = 8x8 µm 2 Topologically, the SFS junction is placed between Nb-wiring nodes of pre-fabricated circuit.

October , Chernogolovka 27 dc-interferometer with integrated SFS π-junction Voltage-flux characteristics of the dc interferometers: a) conventional, b) with SFS p-junction

October , Chernogolovka 28 Integration of the  - SFS junction into TFF circuit ∆ =π∆ =π L π-SFS JJ Conventional TFF circuit TFF with integrated π-SFS junction Proposed in: A. Ustinov and V. Kaplunenko J. Appl. Phys. 94, 5405, 2003

October , Chernogolovka 29 Integration of the  - SFS junction into TFF circuit Phase drop, input junction Phase drop, TFF junctions Voltage, TFF junction Voltage,  -junction operation ranges: j c =  32%, I b =  40%, L =  50%  - junction substituted by fixed phase shift of  and junction having I c of large value

October , Chernogolovka 30 Microphotograph of integrated circuit JTL TFF SFQ/dc 50 µm I_in I_bias V_out2 V_out1 SFS  -junction dc/SFQ SFQ pulses generated by dc/SFQ converter, processed by TFF with integrated  -SFS junction and converted to the voltage levels by SFQ/dc converter circuits

October , Chernogolovka 31 TFF circuit with integrated SFS π–junction a) Block diagram of the test circuitb) microphotograph of the TFF circuit

October , Chernogolovka 32 Proof of correct operation of TFF circuit with integrated SFS π–junction When SFS junction is in a π–state then circuit operates properly T out1 = T out2 = 4T in Bias current margin of the circuit is  19% and limited by bias current margins of dc/SFQ converters! Circuit realized in Nb/Al technology with j C =100 A/cm 2

October , Chernogolovka 33 Conclusion We have successfully integrated the phase shifting elements in RSFQ circuits without deep modification of currently available technological process. The following phase shifting elements were experimentally studied: –superconducting ring with trapped flux quantum –SFS  -junctions 00  -JJ

October , Chernogolovka 34 Outlook Measurements of operation ranges of bias current of SFQ circuits with integrated SFS  -junctions - design of the TFF circuit with separate bias current Bit error rate (BER) measurements - realisation of the TFF circuit incorporated into ring oscillator

October , Chernogolovka 35 Integration of the  - SFS junction into TFF circuit Schematic for the circuit simulation, operation ranges, j c =  32%, I b =  40%, L =  50%  - junction substituted by fixed phase shift of  and junction having I c of large value