Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU

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Presentation transcript:

Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU Lecture 7 Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU

Real Mode Memory Addressing The first 1MB memory is Real memory or the Conventional memory * Segment 1 Segment 2 Segment n 0000h CS 8000h DS A000h SS 1MB offset 16 bit Segment registers 1 MB requires 20 bit address Each segment is 64 KB Offset address is 16 bit or 2 byte Actual address = segment address + offset address

Real Mode Memory Addressing Real mode operation allows to address 1MB of memory space – even for the Pentium microprocessor This first 1MB memory is called the real memory or the conventional memory A combination of segment and offset address access the real memory Segment registers contains the beginning address of any 64KB memory segment The offset address selects the any location within the 64KB memory space

Segment Plus Offset Determines Address To get the real address Pad 0H at the end of segment register Add the offset value 10000H F000H 1F000H CS = 1000H Offset = F000H 12340H 245FH 1479FH DS = 1234H Offset = 245FH Since each segment is 64 K, the offset address can take maximum of FFFFH Once, the beginning address is found in segment registers, ending address is calculated by adding FFFFH with the value of segment register after padding 0H after it. From Intel Microprocessor

Default Segment and Offset Registers If CS = 1400H and IP/EIP = 1200 H The microprocessor access instruction from 14000 H+ 1200H = 15200H.

Allows relocation Suppose 1000H bytes of code 190H bytes of data Figure 2-4: A memory system showing the placement of four memory segments Suppose 1000H bytes of code 190H bytes of data 200H bytes of stack Allows relocation Figure 2-5

Protected Mode The segment register now contains a selector Selector selects a descriptor from a descriptor table The descriptor describes the memory segment’s location Two descriptor table Global Descriptor Table (GDT) Local Descriptor Table (LDT)

Selectors and Descriptors * GDT/LDT 8191 * 2 1 16 8 31 15 7 Offset Segment Registers As Selector 8192 number of descriptors in each table Each descriptor 8 bytes long, thus table size is 64 KB Selector selects one descriptor Descriptor describes the segment

Selectors and Descriptors CS/DS/ES Offset 16 8 31 15 7 GDT/LDT 8191 * 2 1 Segment Register 0000 0000 0001 0010 0012H 0000 0000 0100 0100 0044H 1111 1111 1111 0000 FFF0H

Selectors and Descriptors CS/DS/ES Offset 16 8 31 15 7 GDT/LDT 8191 * 2 1

Access Right Bits

Selectors and Descriptors CS/DS/ES Offset 16 8 31 15 7 GDT/LDT 8191 * 2 1 7 5 3 1 6 4 2 0000 0000 0000 0000 1001 1011 00H A0H C2H 10H 00H

Selectors and Descriptors CS/DS/ES Offset 16 8 31 15 7 GDT/LDT 8191 * 2 1 Code a descriptor for 80286 that starts at 210000H and ends at 21001FH. This memory segment is a code segment that can be read 7 5 3 1 6 4 2 0000 0000 0000 0000 21H 00H 00H 00H 1FH Limit = 21001FH – 210000H = 001FH

Selectors and Descriptors Code a descriptor for 80286 that starts at 210000H and ends at 21001FH. This memory segment is a code segment that can be read 7 5 3 1 6 4 2 0000 0000 0000 0000 1xx1 1x11 21H 00H 00H 00H 1FH Limit = 21001FH – 210000H = 001FH

Selectors and Descriptors 32 bit / 4 byte base, memory size is 4 GB = 22x210x210x210 AV = 1, means available, 0 means not available D = 1, means 32 bit instructions, 0 means 16 bit instructions G bit or the Granularity bit G = 0, the limit is from 1 to 1MB in length G = 1, the limit is multiplied by 4K bytes (appended with 000H). So segment length is 4K to 4G bytes in steps of 4K bytes

Selectors and Descriptors 7 5 3 1 6 4 2 01H AV D O 0H 00H 00H 00H FFH FFH Start = 01000000H Limit = 0FFFFH End = 0100FFFFH G bit or the Granularity bit G = 0, the limit is from 1 to 1MB in length G = 1, the limit is multiplied by 4K bytes (appended with 000H). So segment length is 4K to 4G bytes in steps of 4K bytes

Selectors and Descriptors 7 5 3 1 6 4 2 00H AV 1 D O 0H 28H 00H 00H 00H 10H Start = 00280000H Limit = End = 00010 000 H G bit or the Granularity bit G = 0, the limit is from 1 to 1MB in length G = 1, the limit is multiplied by 4K bytes (appended with 000H). So segment length is 4K to 4G bytes in steps of 4K bytes 00390000H

G bit or the Granularity bit 7 5 3 1 6 4 2 03H AV G 1 D O 0H 00H 00H 00H 2FH FFH End = 05FFFFFFH Start = 03000000H G bit or the Granularity bit G = 0, the limit is from 1 to 1MB in length G = 1, the limit is multiplied by 4K bytes (appended with 000H). So segment length is 4K to 4G bytes in steps of 4K bytes Size = 02FFFFFFH Limit = 02FFFH

03H 1 0H 1xx1 001x 00H 00H 00H 2FH FFH End = 05FFFFFFH 7 5 3 1 6 4 2 03H AV G 1 D O 0H 1xx1 001x 00H 00H 00H 2FH FFH End = 05FFFFFFH Start = 03000000H Size = 02FFFFFFH Limit = 02FFFH

References Chapter 2, Intel Microprocessors – by Brey