Arithmetic in Computers. 2301274Chapter 4 Arithmetic in Computers2 Outline Data representation integers Unsigned integers Signed integers Floating-points.

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Presentation transcript:

Arithmetic in Computers

Chapter 4 Arithmetic in Computers2 Outline Data representation integers Unsigned integers Signed integers Floating-points Addition and subtraction Multiplication Division Floating-point operations

Chapter 4 Arithmetic in Computers3 Unsigned integers Binary representation in a word (4-bytes) Byte Ordering is represented as follows How to store it in memory addressed N Big Endian (big end is stored first) Little Endian (little end is stored first) Address:N N+1 N+2 N Address:N N+1 N+2 N+3

Chapter 4 Arithmetic in Computers4 Signed Integers Sign and magnitude representation Problems 2 representations of zero +0: 00000…000 -0: 10000…000 More complex adder 2’s complement representation Example: 4-bit representation Problems The sizes of largest positive and smallest negative are different by 1. Sign bit magnitude Same as sign and magnitude representation

Chapter 4 Arithmetic in Computers5 Converting 2’s complement binary What is the 2’s complement representation of -3? Using 8-bit representation, 3 is To get 2’s complement representation of (3) bitwise complement add

Chapter 4 Arithmetic in Computers6 Calculate value from 2’s complement For n-bit 2’s complement b n-1 b n-2 … b 1 b 0 Value: -b n-1  2 n-1 + ∑ 0 n-2 b i  2 i Ex: represents the value = = -25 If b n-1 =0, the value  0 (i.e. ∑ 0 n-2 b i  2 i ) If b n-1 =1, the value <0 (i.e. ∑ 0 n-2 b i  2 i – 2 n-1 ) For n-bit 2’s complement b n-1 b n-2 … b 1 b 0 Value: if b n-1 =0 ( b n-2 … b 1 b 0 ) 2 if b n-1 =1 Negative of the value of 2’s complement of ( b n-2 … b 1 b 0 ) 2 Ex: Consider ’s complement of is ( ) = , which is represents -25.

Chapter 4 Arithmetic in Computers7 Advantages of 2’s complement representation Only one representation of zero. Most significant bit acts as sign bit. 2’s complement of 2’s complement of x is x. Simple for hardware design.

Chapter 4 Arithmetic in Computers8 Sign Extension In machine code, addi $t0, $t0, -3 is To copy -3 (FFFD) to be added to $t0, -3 needed to be extended to 32 bits (4 bytes). It is not possible to put 0’s in the upper 2 bytes Put 1’s in the upper 2 bytes oprsrtConst/addr F F F D F DF F DF ? F DF F DF 0 F DF F DF

Chapter 4 Arithmetic in Computers9 Sign Extension Other operations which require sign extension. Load /store byte Load/store halfword

Chapter 4 Arithmetic in Computers10 Addition & Subtraction Binary addition/subtraction ’s complement addition/subtraction

Chapter 4 Arithmetic in Computers11 n-bit adder n-bit subtractor n-bit adder … … x n-1 x n-2 x 1 x 0 z n-1 z n-2 z 1 z 0 C in C out … y n-1 y n-2 y 1 y 0 0 n-bit adder … x n-1 x n-2 x 1 x 0 C in C out … y n-1 y n-2 y 1 y 0 1 … z n-1 z n-2 z 1 z 0 xy x  y

Chapter 4 Arithmetic in Computers12 Adder/ subtractor y n-1 y n-2 y 1 y 0 n-bit adder … … x n-1 x n-2 x 1 x 0 sub z n-1 z n-2 z 1 z 0 C in C out xy x  y

Chapter 4 Arithmetic in Computers13 Overflow OperationOperand AOperand B Overflow if result is … A+B A-B Overflow occurs when the result of an operation is too large to fit in a word.

Chapter 4 Arithmetic in Computers14 Multiplication x 2B 16 x D B EF

Chapter 4 Arithmetic in Computers15 Multiplication Algorithm START Multiplier 0 =0? Add Multiplicand to Result Result=0; loop=0 Shift left Multiplicand once; Shift right Multiplier once; Increment loop loop<32? STOP F T F T

Chapter 4 Arithmetic in Computers16 Hardware: Sequential Multiplication Multiplicand (64-bit shift-left register) Multiplier (32-bit shift-right register) Result (64-bit register) test 32 loops 64-bit ALU test Multiplier 0

Chapter 4 Arithmetic in Computers17 Hardware: Parallel Multiplication 32-bit adder... Mplier 0 ·Mcand Mplier 3 ·Mcand Mplier 1 ·Mcand Mplier 30 ·Mcand Mplier 31 ·Mcand Mplier 2 ·Mcand prdt 0 prdt 2 prdt 3 prdt 1 prdt 30 prdt bit 32 bit (Mcand) (Mplier)x

Chapter 4 Arithmetic in Computers18 Division )

Chapter 4 Arithmetic in Computers19 Division Algorithm START Remainder<0? Shift left Quotient and set rightmost bit to 1 Remainder = Remainder – Divisor Shift right divisor once; Increment Loop loop<33? STOP FT F T Shift left Quotient and set rightmost bit to 0 Restore Remainder Initialization: Quotient = 0 Remainder = Dividen Divisor = Divisor<<32 Loop = 1

Chapter 4 Arithmetic in Computers20 Execution remainder divisor quotient Round Sol:

Chapter 4 Arithmetic in Computers21 Hardware: Division Divisor (64-bit shift-right register) Quotient (32-bit shift-left register) Remainder (64-bit register) test 33 loops 64-bit ALU test Remainder

Chapter 4 Arithmetic in Computers22 Improved Hardware: Division Divisor (32-bit shift-right register) Remainder (64-bit register) test 32-bit ALU

Chapter 4 Arithmetic in Computers23 Floating-point Representation exponentfraction sign (-1) s  F  2 E Normalization is needed. F=1.xxxxxxxxx 2 Normalized number E = exponent – bias If bias= …0 represents …01 represents …1 represents 0 100…0 represents 1 11…10 represents 127 Why can’t 2’s complement be used? What does 111…1 represents?

Chapter 4 Arithmetic in Computers24 IEEE 754 floating point standard exponentfraction sign (-1) s  F  2 E Single precision (bias=127) Double precision (bias=1023) exponent fraction sign 310 fraction

Chapter 4 Arithmetic in Computers25 Floating-point value exponentfraction sign Value=(-1) sign  (1.b 22 b 21 …b 0 ) 2  2 ((b 30 b 29 …b 23 ) 2 -bias) Single precision

Chapter 4 Arithmetic in Computers26 Normalization If a floating-point is in the form of 0.xxx  2 yyy, it is denormalized. To normalized F  2 E Repeat { F=F<<1 E=E-1 } until the MSB of F is 1 F=F<<1 E=E-1

Chapter 4 Arithmetic in Computers27 Special Cases for Floating-point Range Max. number, min. number Precision The last digit represented in the number Special values (IEEE standard)  exponent =(1…1) 2  reserved Fraction = 0 NaN (Not a Number) exponent =(1…1) 2  reserved Fraction  0 Overflow occurs when the positive exponent is too large. Underflow occurs when the negative exponent is too large.

Chapter 4 Arithmetic in Computers28 Floating-Point Addition Let X= F  2 B and Y= G  2 D, where F=1.A, G= 1.C To add X and Y If B<D find G’=G  2 D-B and Y= G  2 D =G’  2 B. Z = (F+G’)  2 B. If B>D find F’=F  2 B-D and X= F  2 B =F’  2 D. Z = (F’+G)  2 D. If B=D Z = (F+G)  2 B. Finally, normalized Z.

Chapter 4 Arithmetic in Computers29 Floating-Point Multiplication Let X= F  2 B and Y= G  2 D, where F=1.A, G= 1.C Let Z= X  Y = F  2 B  G  2 D = (F  G)  2 B+D. To multiply X and Y find F  G, and B+D. Z = (F+G)  2 B+D. Finally, normalized Z.

Chapter 4 Arithmetic in Computers30 Floating point operand in MIPS 32 floating-point registers $f0, $f1, …, $f31 Size of each register = 32 bits 1 single-precision data can be stored in 1 floating- point register. 1 double-precision data must be stored in a pair of floating-point registers. For double-precision data, $f0 refers to the pair $f0,$f1.

Chapter 4 Arithmetic in Computers31 Floating-point Arithmetic InstructionExampleMeaning FP add single add.s $f2,$f4,$f6 $f2 = $f4 + $f6 FP subtract single sub.s $f2,$f4,$f6 $f2 = $f4 - $f6 FP multiply single mul.s $f2,$f4,$f6 $f2 = $f4 * $f6 FP divide single div.s $f2,$f4,$f6 $f2 = $f4 / $f6 FP add double add.d $f2,$f4,$f6 $f2 = $f4 + $f6 FP subtract double sub.d $f2,$f4,$f6 $f2 = $f4 - $f6 FP multiply double mul.d $f2,$f4,$f6 $f2 = $f4 * $f6 FP divide double div.d $f2,$f4,$f6 $f2 = $f4 / $f6

Chapter 4 Arithmetic in Computers32 Floating-point Data Transfer InstructionExampleMeaning load word coprocessor 1 lwc1 $f1,100($2) $f1 = Memory[$2+100] store word coprocessor 1 swc1 $f1,100($2) Memory[$2+100] = $f1 load double l.d $f0,100($2) $f0 = Memory[$2+100] $f1 = Memory[$2+104] store double s.d $f0,100($2) Memory[$2+100] = $f0 Memory[$2+104] = $f1

Chapter 4 Arithmetic in Computers33 Floating-point Comparison InstructionExampleMeaning branch on FP true bc1t 100 if (cond == 1) go to PC branch on FP false bc1f 100 if (cond == 0) go to PC FP compare single (eq,ne,lt,le,gt,ge ) c.lt.s $f2,$f4 if ($f2 < $f4) cond=1; else cond=0 FP compare double (eq,ne,lt,le,gt,ge ) c.lt.d $f2,$f4 if ($f2 < $f4) cond=1; else cond=0

Chapter 4 Arithmetic in Computers34 Note Data and program are stored in memory. How to interpret what a bit sequence means depends on what it represents An assembly instruction See Instruction formats, fields, op codes Data Unsigned integers: binary numbers Signed integers : 2’s complement numbers Floating-points: Exponent Fraction Sign

Chapter 4 Arithmetic in Computers35