ES 112 Project 2 bit ALU.

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Presentation transcript:

ES 112 Project 2 bit ALU

Design a 2-bit ALU Design a 2-bit ALU capable of performing the following operations: ADD Multiplication Bitwise AND Bitwise OR

Description of ADD operation Assume that the bits are unsigned Inputs (A1, A0) and (B1, B0) Implement the 2 bit adder in a “flat schematic”, i.e. draw all your gates in the same schematic. Do not use subcircuits for this exercise.

Description of a Multiply Operation Inputs (A1, A0) and (B1, B0) Implement the 2 bit multiplier in a “flat schematic

Definition of the 4-1 MUX S1 S0 Operation Multiplication 1 Add Multiplication 1 Add Bitwise AND Bitwise OR

Multiply S1 S0 A1 A0 B1 B0 D3 D2 D1 D0 1

Add Operation S1 S0 A1 A0 B1 B0 D3 D2 D1 D0 1

AND Operation S1 S0 A1 A0 B1 B0 D3 D2 D1 D0 1

OR Operation S1 S0 A1 A0 B1 B0 D3 D2 D1 D0 1

Schematic of 2 Bit Adder

Schematic of 2 Bit Multiplier

Schematic of 2 Bit AND

2 Bit OR

Schematic of 4-1 Mux

Top Level Schematic