SUPPLEMENTARY CHAPTER 2 Instruction Addressing Modes

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SUPPLEMENTARY CHAPTER 2 Instruction Addressing Modes The Architecture of Computer Hardware and Systems Software: An Information Technology Approach 3rd Edition, Irv Englander John Wiley and Sons 2003 Linda Senne, Bentley College Wilson Wong, Bentley College

Little Man Computer Direct, absolute addressing Direct: data is reached directly from the address in the instruction Absolute: address in the instruction field is the actual memory location being addressed Supplementary Chapter 2 Instruction Addressing Modes

Additional Addressing Modes Programmer-accessible registers Provide faster execution with register-based instructions Alternatives to absolute addressing Allow larger range of addressable memory While using a reasonable number of bits for the address field Alternatives to direct addressing Facilitate writing certain types of programs Example: loops that use index to address different entries in a table or array Supplementary Chapter 2 Instruction Addressing Modes

Register Addressing Does not require a memory access Faster execution Implemented directly as part of the CPU RISC machine instruction set: made up almost entirely of register operation instructions Supplementary Chapter 2 Instruction Addressing Modes

Fetch-Execute Cycle for Register-to-Register Move Register Addressing Fetch-Execute Cycle for Register-to-Register Move PC -> MAR Transfer the address from the PC to the MAR MDR -> IR Transfer the instruction to the IR contents(IR[add1]) -> contents(IR[add2]) Move contents of source register to destination register PC + 1 -> PC Program Counter incremented* *Done in parallel with move; only 3 time units required Supplementary Chapter 2 Instruction Addressing Modes

Additional Addressing Modes Programmer-accessible registers Provide faster execution with register-based instructions Alternative to absolute addressing Allow larger range of addressable memory While using a reasonable number of bits for the address field Alternative to direct addressing Facilitate writing certain types of programs Example: loops that use index to address different entries in a table or array Supplementary Chapter 2 Instruction Addressing Modes

Active Area of Memory Code executes in a small area of memory that changes as program proceeds Well-written code Small modular subroutines and procedures Local variables Conditional branches Fig S2.2 Supplementary Chapter 2 Instruction Addressing Modes

2 Alternatives to Absolute Addressing Base register addressing Relative addressing Both provide starting address and an offset or displacement from the starting point Starting address in register or program counter Offset: address in the instruction Programming advantage: relocatability Supplementary Chapter 2 Instruction Addressing Modes

Base Register Addressing Base register set to initial address Hardware design: special, separate register or general-purpose registers Generally large to provide large memory space, frequently gigabytes Final address: contents of instruction address field added to the base address Supplementary Chapter 2 Instruction Addressing Modes

IBM zSystem Base register address creation Base 1375 1 20 Instruction + = 1395 actual location (absolute address in memory) Supplementary Chapter 2 Instruction Addressing Modes

IBM zSystem 16 64-bit general-purpose registers Load instruction format op code reg # index base # displacement bit 0 7 8 11 12 15 16 19 20 31 Supplementary Chapter 2 Instruction Addressing Modes

IBM zSystem Example: Load Base-value register: general-purpose register 3 1 C 2 5 E 016 Displacement for the instruction 3 7 A16 Absolute address 1 C 2 5 E 016 3 7 A16 = 9 Supplementary Chapter 2 Instruction Addressing Modes

IBM zSystem Example: Load Instruction Word Op code Destination register Base register Displacement 58 6 3 37A Supplementary Chapter 2 Instruction Addressing Modes

Fetch-Execute Cycle for Relative Address PC -> MAR Transfer the address from the PC to the MAR MDR -> IR Transfer the instruction to the IR IR[Address] + PC -> MAR Address portion of the instruction added to the PC and loaded into the MAR MDR + A -> A Value in the MDR added to the value of the accumulator PC + 1 -> PC Program Counter incremented Supplementary Chapter 2 Instruction Addressing Modes

Relative Addressing Value in address field added to value in program counter Program counter used as the base register Similar to base addressing Constraint: address field must be able to store and manipulate positive and negative numbers Complementary representation Supplementary Chapter 2 Instruction Addressing Modes

Relative Addressing Example Program Counter 46 1 3 Instruction + = 49 actual location (absolute address in memory) Supplementary Chapter 2 Instruction Addressing Modes

Direct Addressing Separates data into location different from location of instructions Benefits to programmer Data can be changed without affecting the instruction itself Data is available to different instructions Supplementary Chapter 2 Instruction Addressing Modes

Additional Addressing Modes Programmer-accessible registers Provide faster execution with register-based instructions Alternative to absolute addressing Allow larger range of addressable memory While using a reasonable number of bits for the address field Alternative to direct addressing Facilitate writing certain types of programs Example: loops that use index to address different entries in a table or array Supplementary Chapter 2 Instruction Addressing Modes

Alternatives to Direct Addressing Immediate addressing Indirect addressing Register Indirect addressing Indexed addressing Immediate addressing - store the data in the instruction iitself (common if the data is a constant), no additional memory access required, Indirect addressing - separate the address of the instruction from the instruction itself, (use of subscripts in an array), Like the use of pointers, Register indirect - the address point of (above) is stored in a general purpose register, v. efficient, once the register is loaded data can be accessed in the same number of F-E cycles as direct addressing, but the size of the address field is small, Autoincrementing autodecrementing - Indexed addressing - uses the address in the instruction but modifies this address by adding in a value from another register. (may use a special index register), used as a table offset for handling subscripting, Autoindexing - Supplementary Chapter 2 Instruction Addressing Modes

Immediate Addressing Store data with the instruction itself Example: Data is a constant Constraint: Address field must be able to store and manipulate positive and negative numbers Complementary representation Advantage: Additional memory access not required Faster execution Supplementary Chapter 2 Instruction Addressing Modes

Immediate Addressing Modified LMC Example Constant limited to the size of address field op code addressing mode address field 1 05 (Load) (the number 05) Supplementary Chapter 2 Instruction Addressing Modes

Immediate Addressing Modified LMC Example PC -> MAR Transfer the address from the PC to the MAR MDR -> IR Transfer the instruction to the IR IR[Address]-> A Move contents of source register to Accumulator PC + 1 -> PC Program Counter incremented Supplementary Chapter 2 Instruction Addressing Modes

Indirect Addressing Address field of the instruction contains the address of the data Similar to pointers in Pascal or C Frequently used with subscripted data in a table Memory address Data Table Subscript 77 136 TABLE(1) 78 554 TABLE(2) 79 302 TABLE(3) : Supplementary Chapter 2 Instruction Addressing Modes

Little Man Indirect Addressing a. The Little Man reads in instruction b. ,,, he finds the address of the data Supplementary Chapter 2 Instruction Addressing Modes

Little Man Indirect Addressing c. … from that address he retrieves the data d. … with a different address in location 45, he retrieves different data (note: In this step the address of the data has been incremented). Supplementary Chapter 2 Instruction Addressing Modes

Incrementing Treat the instruction as data Modify the address field Pure code: does not modify itself during execution Incrementing does not modify the instruction Address stored in a separate data region Advantage: program can be stored in ROM Supplementary Chapter 2 Instruction Addressing Modes

Totalizer Loop with Direct Addressing Mailbox Instruction Comments 00 LOAD 90 /this actually loads "ADD 60".. 01 STORE 07 /..into mailbox 07 02 91 /initialize the totalizer 03 99 04 92 /initialize the counter to 19 05 98 06 /load the total /[ADD 60, ADD 61, etc.] 08 /and store the new total 09 /modify the instruction in 07.. 10 ADD 93 /..by adding 1 as though the .. 11 /..instruction were data 12 13 SUB /decrement the counter 14 15 BRP /loop back if not done 16 /done.. 17 OUT /output the result 18 HALT 60 /initial data for location 07 19 1 /used to hold the current count /used to hold the current total Totalizer Loop with Direct Addressing Instruction in location 07 treated as data, incremented, and replaced to its original location Figure 10.15 and 10.16

Totalizer Loop with Indirect Addressing Mailbox Instruction Comments 00 LOAD 90 /this time just the initial.. 01 STORE 97 /..address is saved.. 02 91 /as.. 03 99 04 92 /… 05 98 06 /…before 07 ADD * /this is the indirect instruction 08 09 /modify the address in 97 (this is direct).. 10 ADD 93 /..by adding 1 to it … 11 12 /as… 13 SUB 14 15 BRP 16 17 OUT /before 18 HALT 60 /now this is the initial address 19 1 /used to hold the address of the data /used to hold the current count /used to hold the current total Totalizer Loop with Indirect Addressing Asterisk used to indicate indirect instruction Figure 10.15 and 10.16

Register Indirect Addressing Also called register deferred addressing Address pointed is stored in a general-purpose register Advantage: efficient 1 instruction to load pointer address in register Data accessed in the same number of fetch-execute instructions as direct addressing Small address field required (3 or 4 bits) Excellent for addressing large memory space with small instruction word Supplementary Chapter 2 Instruction Addressing Modes

Register Indirect Addressing Dual Duty Autoincrementing/autodecrementing Direct implementation of C’s “++” and “- -” Instruction Performs normal function like LOAD or ADD Plus increments or decrements register each time instruction executed Advantage: simplifies writing program loops Replaces steps 7,9,10, 11 on Slide #28 Supplementary Chapter 2 Instruction Addressing Modes

Register Indirect Addressing Obtaining Data Supplementary Chapter 2 Instruction Addressing Modes

Motorola 68000 CPU MOVE Supplementary Chapter 2 Instruction Addressing Modes

Indexed Addressing Use address in the instruction like direct addressing But modify address by adding value from another register General purpose or special index register Supplementary Chapter 2 Instruction Addressing Modes

Indexed vs. Base Offset Both offset address by amount stored in another register Base offset: primarily to expand addressing range for a given address field size Value of base address likely to be large and rarely changed during execution Index register: primarily a table offset for subscripting Value in index register most like small and frequently changing Autoindexing: similar to autoincrementing Supplementary Chapter 2 Instruction Addressing Modes

Index Register: Modifying an Address Supplementary Chapter 2 Instruction Addressing Modes

Using Both Base Offset and Indexed Addressing Supplementary Chapter 2 Instruction Addressing Modes

Totalizer Loop with Indexed Addressing Mailbox Instruction Comments 00 LDA 91 /total is kept in A. This sets A to 0 (not indexed). 01 LDX 92 /initialize the counter to 19 02 ADD @ 60 /ADD 79, ADD 78, etc. as X is decremented 03 DEC X /Decrement the index–19, 18, etc. 04 BRPX /test if done (when X decrements from 0 to -1) 05 OUT /done; output the result from A 06 HALT 19 Note: @ symbol indicates indexed instruction LDX: LOAD register X is the indexed register (offset and counter) LDA: LOAD accumulator Supplementary Chapter 2 Instruction Addressing Modes

Copyright 2003 John Wiley & Sons All rights reserved. Reproduction or translation of this work beyond that permitted in Section 117 of the 1976 United States Copyright Act without express permission of the copyright owner is unlawful. Request for further information should be addressed to the permissions Department, John Wiley & Songs, Inc. The purchaser may make back-up copies for his/her own use only and not for distribution or resale. The Publisher assumes no responsibility for errors, omissions, or damages caused by the use of these programs or from the use of the information contained herein. Supplementary Chapter 2 Instruction Addressing Modes