Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering EE 333 Exam 2 November 9, 2006 Instructions 1.Print your name, student ID, and seat in the above blanks. 2.This is a Closed Book exam. 3.Do all of the problems. They may vary in points but the total is 100. Questions are short answer and problems. 4.Do not use any additional pages of paper. If you run out of room, use the back sides. Do not remove the staple. 5.Please write clearly or print. Illegible or unreadable answers may not be graded for partial credit. 6.Mark your answer with a box or star. Name Student ID Seat Answers
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 1 (10 pts) Determine the control/mux signals for the branch- on-equal EX clock? Mark on the next page. Operation –If (A = = B), PC = ALUout –ALUout = branch address from clock 2 Functional units –ALU must subtract, A-B –ALUout contains optimistic branch address –Zero flag controls write to PC
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 1, continued. (10 pts) Clock 3 Optimistic branch address 01 or sub
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 2 (10 pts) 74LS161 Data Sheet
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 2, continued. (10 pts) Complete the design for an 8-bit PC Data for write Write to PC Increment PC All signals asserted high
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 3 (10 pts) A.List ideal memory design goals. Unlimited size, infinite bandwidth B.What is a memory hierarchy? Multiple levels of memory with different speeds and sizes C.How does a hierarchy approximate the goals? Principal of locality
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 4 (10 pts) Design a 12K x 8 ROM memory using only the ROM and 138 devices, fully decode the address, and start memory at address zero.
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 5 ( 10 pts ) Consider the 16 x 8 RAM design below.
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 5, continued. ( 10 pts ) A.At what time(s) are data written, what are the data and address? (125, FF, 0)(225, AA, 1) (325, 55, 2) B.At what time(s) are data read, what are the data and address? (400, FF, 0)(500, AA, 1) (600, 55, 2)
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 6 (10 pts) Determine the length and width of the memory components required for the system memory in the table below (note: G=1024M, M=1024K)? MemoryComponentLengthWidth 16K x 162K x K x 3216K x M x 32256K x M x 641M x G x 64512M x 888
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 7 ( 10 pts ) Cache memory indexVMtagdata 000YY100x NY110x NN010x YY000xabc 100YN010xdef 101YY110x YY100x NY000x789 For the direct mapped, write-back cache below, complete the table (Y or N)? CPU write adrhit?WB? NN, invalid YN YN NN YN NY NY NN, invalid WB = miss-modified
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 8 (10 pts) A.Draw the block diagram of a controller. B.Explain how it works. The IR and present state dictate the next state, each present state asserts control points (MUXes, read/writes, etc.) Present State NS Decoder Output Decoder IRControl points
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 9 ( 10 pts ) Below is the MDP16 register array and timing diagram
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 9, continued. ( 10 pts ) A.At what time(s) are data written to the array, with what data, which register? (300, FFFF, $0 & $1) (900, 5555, $0) (1300, AAAA, $1) B.At what time(s) does R0out change and to which register value? (500, $0) (1100, $0) (1900, $1) (2100, $0) (2300, $1)
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 10 (10 pts) opadr op rsrtadr/imm I J R op rsrt funcrd Below is the instruction formats for the MDP16 computer, answer the following questions.
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Problem 10, continued. (10 pts) A.Why do we have just two registers? Need only one bit to define B.What is the most positive and negative address offset? C.What is the range of the jump address? 0x000 to 0xfff = 0000 to 4095
Fall EE 333 Lillevik333f06-e2 University of Portland School of Engineering Statistics ProbStdAve 1/ / / / / / / / / / Ave