Infrared Detector & ASIC Technology Markus Loose STScI, May 8, 2014

Outline CMOS-based Detectors (infrared) Control ASICs Conclusion General Properties of Solid State Detectors CMOS-based Multiplexers Examples Control ASICs General Description Example: SIDECAR ASIC Preamp, Biases, ADCs Noise performance and issues Conclusion May 08, 2014 STScI Lecture

CMOS-based Infrared Sensors ( CMOS: Complimentary Metal Oxide Silicon ) May 08, 2014 STScI Lecture

Scientific Detector Workshop, Garching, Germany The Ideal Detector Detect 100% of photons Each photon detected as a delta function Large number of pixels Time tag for each photon Measure photon wavelength Measure photon polarization Up to 98% quantum efficiency One electron for each photon gfdg ~1,400 million pixels (>109) No - framing detectors No – defined by filter Plus Read Noise and other “Features” Oct 15, 2009 Scientific Detector Workshop, Garching, Germany

Hybrid Imager Architecture Image of indium bump array in comparison to human hair (credit: Laser Focus World) May 08, 2014 STScI Lecture

Energy of a Photon Wavelength (m) Energy (eV) Band 0.3 4.13 UV 0.5 2.48 Vis 0.7 1.77 1.0 1.24 NIR 2.5 0.50 SWIR 5.0 0.25 MWIR 10.0 0.12 LWIR 20.0 0.06 VLWIR Energy of photons is measured in electron-volts (eV) eV = energy that an electron gets when it “falls” through a 1 Volt field. May 08, 2014 STScI Lecture

An Electron-Volt (eV) is extremely small 1 eV = 1.6 • 10-19 J (J = joule) 1 J = N • m = kg • m • sec-2 • m 1 kg raised 1 meter = 9.8 J = 6.1 • 1019 eV The energy of a photon is VERY small The energy of a SWIR (2.5 m) photon is 0.5 eV Drop a peanut M&M® candy from a height of 2 inches Energy is equal to 6 x 1015 eV (a peanut M&M® is ~2 g) This is equal to 1.2 x 1016 SWIR photons 1 million x 1 million x 12,000 The number of photons that will be detected in ~1 million images from the James Webb Space Telescope (JWST) A 2-inch peanut M&M® drop is more energy than will be detected during the entire 5-10 year lifetime of the JWST ! May 08, 2014 STScI Lecture

Photon Detection Eg (eV) c (m) For an electron to be excited from the conduction band to the valence band h > Eg h = Planck constant (6.6310-34 Joule•sec) = frequency of light (cycles/sec) = /c Eg = energy gap of material (electron-volts) Conduction Band Eg Valence Band c = 1.238 / Eg (eV) Material Name Symbol Eg (eV) c (m) Silicon Si 1.12 1.1 Indium-Gallium-Arsenide InGaAs 0.73 – 0.48 1.68 – 2.6 Mercury-Cadmium-Teluride HgCdTe 1.00 – 0.07 1.24 – 18 Indium Antimonide InSb 0.23 5.5 Arsenic doped Silicon Si:As 0.05 25 May 08, 2014 STScI Lecture

General CMOS Detector Concept CCD Approach CMOS Approach Pixel Charge generation & charge integration Charge generation, charge integration & charge-to-voltage conversion + Photodiode Amplifier Array Readout Charge transfer from pixel to pixel Multiplexing of pixel voltages: Successively connect amplifiers to common bus Sensor Output Output amplifier performs charge-to-voltage conversion Various options possible: no further circuitry (analog out) add. amplifiers (analog output) A/D conversion (digital output) May 08, 2014 STScI Lecture

General Architecture of CMOS-Based Image Sensors Bias Generation & DACs (optional) Control & Timing Logic (optional) Vertical Scanner for Row Selection Pixel Array A/D conversion (optional) Digital Output Horizontal Scanner / Column Buffers Analog Amplification Analog Output May 08, 2014 STScI Lecture

IR Multiplexer Pixel Architecture Vdd amp drain voltage Output Detector Substrate Photvoltaic May 08, 2014 STScI Lecture

IR Multiplexer Pixel Architecture Vreset reset voltage Reset Vdd amp drain voltage Output Detector Substrate Photvoltaic May 08, 2014 STScI Lecture

IR Multiplexer Pixel Architecture Vdd amp drain voltage Vreset reset voltage Reset Enable “Clock” (red) “Bias voltage” (purple) Output Detector Substrate Photvoltaic May 08, 2014 STScI Lecture

Special Scanning Techniques in CMOS Different scanning methods are available to reduce the number of pixels being read: Allows for higher frame rate or lower pixel rate (reduction in noise) Can reduce power consumption due to reduced data Windowing Reading of one or multiple rectangular subwindows Used to achieve higher frame rates (e.g. AO, guiding) Subsampling Skipping of certain pixels/rows when reading the array Used to obtain higher frame rates on full-field images Random Read Random access (read or reset) of certain pixels Selective reset of saturated pixels Fast reads of selected pixels Binning Combining several pixels into larger super pixels Used to achieve lower noise and higher frame rates * Binning is typically less efficient in CMOS than in CCDs. May 08, 2014 STScI Lecture

Possible Reset Schemes for HxRG Stitched CMOS Sensor Reticle May 08, 2014 STScI Lecture

Astronomy Application: Guiding Special windowing can be used to perform full-field science integration in parallel with fast window reads. Simultaneous guide operation and science data capture within the same detector. Two methods possible: Interleaved reading of full-field and window No scanning restrictions or crosstalk issues Overhead reduces full-field frame rate Parallel reading of full-field and window Requires additional output channel Parallel read may cause crosstalk or conflict No overhead  maintains maximum full-field frame rate Full field row Window Full field row Window 16 May 08, 2014 STScI Lecture

Guide Mode Demonstration Video shows a small window in the center, read frequently for guiding, while the full field is read slowly in the background May 08, 2014 STScI Lecture

Teledyne HAWAII-2RG Hybrid Detector Array HgCdTe Astronomy Wide Area Infrared Imager with 2k2 Resolution, Reference pixels and Guide Mode 2k x 2k HAWAII-2RG with HyViSI detector 2 x 2 Mosaic of HAWAII-2RG detectors May 08, 2014 STScI Lecture

H2RG Block Diagram All pads located on one side (top) Approx. 110 doubled I/O pads (probing and bonding) Three-side close buttable 18 µm pixels Total dimensions: 39 x 40.5 mm² May 08, 2014 STScI Lecture

JWST - James Webb Space Telescope 15 Teledyne 2K×2K infrared arrays on board (~63 million pixels) International collaboration 6.5 meter primary mirror and tennis court size sunshield 2018 launch on Ariane 5 rocket L2 orbit (2.4 million km from Earth) NIRCam (Near Infrared Camera) FGS / NIRISS (Fine Guidance Sensors / Near-Infrared Imager and Slitless Spectrograph) NIRSpec (Near Infrared Spectrograph) Two 2x2 mosaics of SWIR 2Kx2K Two individual MWIR 2Kx2K 3 individual MWIR 2Kx2K 1x2 mosaic of MWIR 2Kx2K Acquisition and guiding Images guide stars for telescope stabilization Canadian Space Agency Spectrograph Measures chemical composition, temperature and velocity European Space Agency / NASA Wide field imager Studies morphology of objects and structure of the universe U. Arizona / Lockheed Martin May 08, 2014 STScI Lecture

Control ASICs May 08, 2014 STScI Lecture

How to Operate an Image Sensor? Sensor/Detector requires: DC bias and reference voltages Set properties like offset, bandwidth, reverse detector bias Voltages need to be programmable to allow optimal performance Very low noise to not contribute to the read noise (< 10µV noise) Clocks/Digital control signals Responsible for controlling the readout timing and sensor configuration Configurable timing required Video Signal Readout If digital output sensor, job is mostly done. Simply route to FPGA for data acquisition and storage If analog output sensor: Amplify/buffer analog signal Perform analog-to-digital conversion, then route digital data to FPGA May 08, 2014 STScI Lecture

ASIC as Control Electronics Replace this with this! 1% volume 1% power 1% hassle May 08, 2014 STScI Lecture

SIDECAR ASIC Architecture System for Image Digitization, Enhancement, Control And Retrieval May 08, 2014 STScI Lecture

SIDECAR ASIC Features 36 analog input channels, each channel provides: 500 kHz A/D conversion with 16 bit resolution 10 MHz A/D conversion with 12 bit resolution gain = 0 dB …. 27 dB in steps of 3 dB optional low-pass filter with programmable cutoff optional internal current source (as source follower load) 20 analog output channels, each channel provides: programmable output voltage and driver strength programmable current source or current sink internal reference generation (bandgap or vdd) 32 digital I/O channels to generate clock patterns, each channel provides: input / output / high-ohmic selectable output driver strength and polarity pattern generator (16 bit pattern) independent of microcontroller programmable delay (1ns - 250µs) 16 bit low-power microprocessor core (single event upset proof) responsible for timing generation and data processing 16 kwords program memory (32 kByte) and 8 kwords data memory (16 kByte) 36 kwords ADC data memory, 24 bit per word (108 kByte) additional array processor for adding, shifting and multiplying on all 36 data channels in parallel (e.g. on-chip CDS, leaky memory or other data processing tasks) May 08, 2014 STScI Lecture

SIDECAR Operating a HAWAII-2RG / 1RG Inside the dewar at cryogenic temperatures PC SIDECAR ASIC HAWAII-2RG Sensor Chip Assembly Software for SIDECAR Control and Data Capture Analog Video Vreset Dsub Clock 000 w 384 0cd Biases Power Supply Data In PCI Card or USB interface Serial Interface Data Out Clocks Master Clock 3.3V 3.3V Digital Supply Analog Supply Only 7 lines needed to operate the SIDECAR ASIC in base configuration (3 signal & 4 power lines) The SIDECAR ASIC provides all 27 signals required to operate the HAWAII-2RG The microcontroller driven SIDECAR ASIC generates all biases & clocks and digitizes the analog video outputs May 08, 2014 STScI Lecture

SIDECAR ASIC Flight Package for JWST Ceramic board with ASIC die and decoupling caps Invar box with top and bottom lid Two 37-pin MDM connectors FPE-to-ASIC connection ASIC-to-SCA connection Qualified to NASA Technology Readiness Level 6 (TRL-6) 15 mW power when reading out of four ports in parallel, with 16 bit digitization at 100 kHz per port. SCA side FPE side Comparison: LGA Package ACS (HST) May 08, 2014 STScI Lecture

Missions Employing SIDECAR ASICs James Webb Space Telescope NIRCam, NIRSpec, FGS/NIRISS instruments H2RG IR detectors, T = 38K (ASIC), planned launch in 2018 Hubble Space Telescope ACS (Advanced Camera for Surveys) CCD detector, T = 300K (ASIC), launched in 2009 Landsat Data Continuity Mission TIRS (Thermal InfraRed Sensor) instrument QWIP detector, T = 300K (ASIC), launched in 2013 OSIRIS-REx Asteroid Mission OVIRS (OSIRIS-REx Visible and IR Spectrometer) instrument H1RG IR detector, T = 300K (ASIC), planned launch in 2016 Euclid Mission NISP (Near IR Spectrometer Photometer) instrument H2RG IR detector, T = ~140K (ASIC), planned launch in 2020 MOSFIRE (Multi-Object Spectrometer For Infra-Red Exploration) H2RG IR detector, T < 120K (ASIC), deployed at the Keck Telescope FourStar Wide Field Infrared Camera H2RG IR detector, T < 120K (ASIC), deployed at the Magellan Baade 6.5m Telescope JWST LDCM HST OSIRIS-REx Euclid May 08, 2014 STScI Lecture

Pre-Amplifier Block Diagram Capacitor Feedback Design Gain programmable by setting Cin and Cfb Gain = Cin/Cfb Low pass filter with programmable cutoff S3 S1 V1 V2 V3 V4 S4 Vref mid bypass S5 SAR_En SAR ADC output LPF Pipe_En Pipeline ADC output S2 Cin Cfb S6 Vpremidref May 08, 2014 STScI Lecture

Preamp Drift and Mitigation Data taken as 512 x 64 frames for efficiency, Gain = 4 σ= 52 ADU Drift kTC row noise σ= 13.9 ADU kTC removed (CCD mode) σ= 2.6 ADU May 08, 2014 STScI Lecture

Noise Reduction by Using Multiple ADC Channels PreAmp inputs shorted to ground (lowest noise signal in order to be dominated by ADC noise) PreAmp gain set to 4 (12 dB) Noise measured by using multiple preamp and ADC channels in parallel (1, 2, 4, 6, and 8) Noise reduces almost as the square root of the number of channels used 1 ADC 2 ADCs 4 ADCs 6 ADCs 8 ADCs May 08, 2014 STScI Lecture

Bias Generator Block Diagram SIDECAR has 20 Channels Each Channel provides programmable voltage and current sources Noise is caused mostly by buffer (1/f noise of MOS transistors) Drive strength of buffer can be adjusted to modulate the bandwidth Feedback compensation can be adjusted for stability Buffer can be configured for single or dual stage operation => Tuning required for optimal noise performance May 08, 2014 STScI Lecture

Bias Generator Noise Unfiltered Noise of Bias Output 1 Bias output 1 routed back into PreAmp PreAmp gain set to 22 (27 dB) Use 4 ADCs in parallel to reduce PreAmp & ADC noise Noise on bias without filtering is about 35µV (11.6 ADU) Noise can be reduced by RC filtering to less than 5µV Unfiltered Noise of Bias Output 1 Bias noise as a function of RC filter time constant Filtered Noise of Bias Output 1 (tRC = 360 ms) PreAmp & ADC noise floor May 08, 2014 STScI Lecture

Noise Power Spectrum of the Bias Outputs FFT of temporal noise measurement with RC filter set to tRC= 3 µs FFT of temporal noise measurement with RC filter set to tRC= 3 ms May 08, 2014 STScI Lecture

Noise Power Spectrum of the Bias Outputs, Part 2 FFT of temporal noise measurement with RC filter set to tRC= 360ms FFT of temporal noise measurement with grounded PreAmp inputs (i.e. noise floor) May 08, 2014 STScI Lecture

Analog-to-Digital Conversion Quantization noise of an ADC is (1/√12) Least Significant Bit = 0.289 LSB Typically set gain of amplifier chain so that quantization noise is much less than readout noise. If readout noise is 4 electrons, set gain so that LSB equals ~2 electrons 16 bit ADC is most commonly used in astronomy. At ~2 electrons per ADU (analog to digital unit), or LSB, full well of a 16 bit ADC will be ~130,000 electrons; good match to the typical full well of a CCD or Short-Wave IR detector of 100,000 electrons. Highly exaggerated quantization noise “Don’t do this at home” May 08, 2014 STScI Lecture

Differential Non-Linearity (DNL) DNL describes the distance of an ADC code from its adjacent code. It is measured as a change in input voltage magnitude, and then converted to number of Least Significant Bits (LSBs). DNL = (VD+1 – VD) / VLSB-Ideal – 1 Code 100 is increased DNL = +1 Code 10 is reduced DNL = -0.5 Code 10 is missing DNL = -1 May 08, 2014 STScI Lecture

Integral Non-Linearity (INL) INL describes the deviation of the ADC transfer function from a straight line It can be computed as the integral of the DNL, and is expressed in LSB INL = (VD – VZero) / VLSB-Ideal – D May 08, 2014 STScI Lecture

16-bit ADC Linearity DNL INL DNL [ LSB ] INL [ LSB ] Output Code Differential Non-Linearity: < ± 0.3 LSB Integral Non-Linearity: < ± 0.2 LSB Temporal Noise: 2.7 LSB Output Code May 08, 2014 STScI Lecture

ADC Linearity Pitfalls Differential ADC is composed of 2 separate single-ended ADCs If one of the two ADCs saturates before the second one does, the transfer slope changes by 2 Slope change Slope change Vcm off by 160 mV Vcm off by 80 mV Requires careful adjustment of the ADC reference and common mode voltages Simultaneous optimal tuning for all channels does not exist due to component mismatch Avoid lower and upper end of ADC for science Optimal Vcm May 08, 2014 STScI Lecture

1/F Noise in NIRSpec/JWST Traditional CDS Optimal CDS σCDS ~ 18 e- rms σCDS ~ 8 e- rms May 08, 2014 STScI Lecture

(using real pixels as reference) IRS^2 Noise Reduction Mode Example: NIRSpec 1000s Dark Up-the-Ramp Signal Improved Reference Sampling & Subtraction (IRS^2) is a method to utilized reference pixels in a more efficient way In every output channel, read reference pixels from the top or bottom or rows in-between the regular science pixels (e.g. read 4 reference pixels every 16 science pixels) Use Fourier analysis to determine the frequency-dependent correlation between signal and reference pixels, and subtract the reference pixel signal accordingly IRS^2 (using real pixels as reference) Nominal (no IRS^2) IRS^2 May 08, 2014 STScI Lecture

ACS 1/f Noise Bias Frame without correction (superbias subtracted) Bias Frame with correction (superbias subtracted) May 08, 2014 STScI Lecture

Conclusion Infrared Detectors (Image Sensors) Control ASICs Hybrid design: Detector material bump-bonded to readout chip Different detector materials possible HgCdTe for astronomy: lowest dark current and adjustable bandgap Flexible readout options like guide mode or single-pixel reset Control ASICs Provide all functions to operate the detector Clocking, Biasing, A/D conversion Single-chip solution in contrast to discrete electronics Lower power, space, weight Can run cryogenically (next to the cooled detector) Performance Improvements desired (lower noise, no artifacts) May 08, 2014 STScI Lecture