Julie Prast, DHCAL Meeting, 24 janvier 2008 La carte DIF pour DHCAL (proto au m 2 et au m 3 ) Sebastien Cap, Julie Prast ( LAPP) Christophe Combaret (IPNL)

24 January 2008The DHCAL DIF Board for the m2 and m3 prototype2 Architecture of the DIF board SLABSLAB FPGA ASIC Config ASIC read DAQ interface Slow control Power Supplies DIF LDA (HDMI) DAQ0 (SCSI) USB JTAG HARDROCs analog output DIF Monitoring LDO ADC +/-5V 3.3V 2.5V ….. Mezzanine EP3C16F484

24 January 2008The DHCAL DIF Board for the m2 and m3 prototype3 The DHCAL DIF Board Separated from the slab for more flexibility. Handle slab  the nb of HardRoc (up to 100). Compatible with the DIF Task Force. Interfaces with : – The final DAQ (LDA, …) – The analog DAQ – Neighboring DIFs. – PC through USB for standalone tests and debugs. Handle HardROC power cycling. Compatible with the ASIC of IPN Lyon. High voltage is not foreseen.

24 January 2008The DHCAL DIF Board for the m2 and m3 prototype4 Interface with the SLAB Use of a small intermediate board, which is specific to the FE ASIC and ASU. The DIF can be used : – Whatever the FE ASIC. – Whatever the slab (RPC, uM) – Whatever the slab to slab connection. – Whatever the subdetector ? 1 rst ASU is the same as the others. Common DIF to intermediate board interface between sub detectors (same connector, same pinout). DIF Intermediate board SLAB Connector to be chosen. No special constraint. Connection with the slab is the same as the one between 2 ASUs. 0 Ω resistor, … Samtec FSH/ SFMH ?

24 January 2008The DHCAL DIF Board for the m2 and m3 prototype5 Status and Agenda Electrical schemes being finalized. – 90% done. – CAD well advanced (Merci Sebastien). VHDL code is started. – Help of Guillaume Vouters between March and August. Software tests and acquisition part is studied by Christophe C. First prototype is awaited for May. Main tests should be performed before summer. Board available for M 2 and M 3 prototype.