Novel Reconfigurable Silicon Physical Unclonable Functions Yingjie Lao and Keshab K. Parhi Department of Electrical and Computer Engineering University.

Slides:



Advertisements
Similar presentations
Trusted Design In FPGAs
Advertisements

FPGA (Field Programmable Gate Array)
A Fast Estimation of SRAM Failure Rate Using Probability Collectives Fang Gong Electrical Engineering Department, UCLA Collaborators:
1 An Ultra-lightweight Authentication Protocol in RFID Speaker: 魏家惠.
AN IMPROVEMENT TO A CORRELATION ATTACK ON A5/1 H. Nikoonia, F. Amin, A. H. Jahangir Computer Engineering Department, Sharif University of Technology.
1 SECURE-PARTIAL RECONFIGURATION OF FPGAs MSc.Fisnik KRAJA Computer Engineering Department, Faculty Of Information Technology, Polytechnic University of.
International Symposium on Low Power Electronics and Design Low-Power Sub-Threshold Design of Secure Physical Unclonable Functions 1 Lang Lin, 2 Dan Holcomb,
Security with Noisy Data Boris Škorić TU Eindhoven Ei/Ψ anniversary, 24 April
Physical Unclonable Functions and Applications
1 U NIVERSITY OF M ICHIGAN Reliable and Efficient PUF- Based Key Generation Using Pattern Matching Srini Devadas and Zdenek Paral (MIT), HOST 2011 Thomas.
Physical Unclonable Functions
A New Scheme For Robust Blind Digital Video Watermarking Supervised by Prof. LYU, Rung Tsong Michael Presented by Chan Pik Wah, Pat Mar 5, 2002 Department.
Computer Science CSC 474By Dr. Peng Ning1 CSC 474 Information Systems Security Topic 2.1 Introduction to Cryptography.
Using Hardware Vulnerability Factors to Enhance AVF Analysis Vilas Sridharan RAS Architecture and Strategy AMD, Inc. International Symposium on Computer.
Sheng Xiao, Weibo Gong and Don Towsley,2010 Infocom.
WATERLOO ELECTRICAL AND COMPUTER ENGINEERING 40s: Circuits 1 WATERLOO ELECTRICAL AND COMPUTER ENGINEERING 40s Circuits Department of Electrical and Computer.
Slender PUF Protocol Authentication by Substring Matching M. Majzoobi, M. Rostami, F. Koushanfar, D. Wallach, and S. Devadas* International Workshop on.
FPGA Latency Optimization Using System-level Transformations and DFG Restructuring Daniel Gomez-Prado, Maciej Ciesielski, and Russell Tessier Department.
Daniel E. Holcomb, Wayne P. Burleson and Kevin Fu
Nurbek Saparkhojayev and Dale R. Thompson, Ph.D., P.E. Computer Science and Computer Engineering Dept. University of Arkansas Matching Electronic Fingerprints.
Fuzzy extractor based on universal hashes
Defect Tolerance for Yield Enhancement of FPGA Interconnect Using Fine-grain and Coarse-grain Redundancy Anthony J. Yu August 15, 2005.
Defect Tolerance for Yield Enhancement of FPGA Interconnect Using Fine-grain and Coarse-grain Redundancy Anthony J. Yu August 15, 2005.
Strong Error Detection for Control Units Against Advanced Attackers Kahraman Daglar Akdemir Advisor: Berk Sunar Electrical and Computer Engineering MOTIVATION.
1 Dynamic Key-Updating: Privacy- Preserving Authentication for RFID Systems Li Lu, Lei Hu State Key Laboratory of Information Security, Graduate School.
FPGA Defect Tolerance: Impact of Granularity Anthony YuGuy Lemieux December 14, 2005.
Strategic Directions in Real- Time & Embedded Systems Aatash Patel 18 th September, 2001.
Multimedia Security Digital Video Watermarking Supervised by Prof. LYU, Rung Tsong Michael Presented by Chan Pik Wah, Pat Nov 20, 2002 Department of Computer.
Lecture slides prepared for “Computer Security: Principles and Practice”, 2/e, by William Stallings and Lawrie Brown, Chapter 21 “Public-Key Cryptography.
Hardware Support for Trustworthy Systems Ted Huffmire ACACES 2012 Fiuggi, Italy.
Power Reduction for FPGA using Multiple Vdd/Vth
Doc.: r0 Submission September 17, 2012 René Struik (Intrinsic-Id)Slide 1 Secure Key Storage and True Random Number Generation Date:
Securing the core root of trust (research in secure hardware design and test) Ramesh Karri ECE Department.
Bit Error Probability Evaluation of RO PUFs Qinglong Zhang, Zongbin Liu, Cunqing Ma and Jiwu Jing Institute of Information Engineering, CAS, Beijing, China.
Cryptography, Authentication and Digital Signatures
1 UCR Hardware Security Primitives with focus on PUFs Slide credit: Srini Devedas and others.
Robust Low Power VLSI ECE 7502 S2015 Analog and Mixed Signal Test ECE 7502 Class Discussion Christopher Lukas 5 th March 2015.
Digital Watermarking -Interim Report (EE5359: Multimedia processing) Under the Guidance of Dr. K. R. Rao Submitted by: Ehsan Syed
Technical Seminar Presentation-2004 Presented by : ASHOK KUMAR SAHOO (EI ) NATIONAL INSTITUTE OF SCIENCE & TECHNOLOGY Presented By Ashok Kumar.
Robust Motion Watermarking based on Multiresolution Analysis Tae-hoon Kim Jehee Lee Sung Yong Shin Korea Advanced Institute of Science and Technology.
LOGO Hardware side of Cryptography Anestis Bechtsoudis Patra 2010.
Project Presentation: Physical Unclonable Functions
Extracting Robust Keys from NAND Flash Physical Unclonable Functions Shijie Jia, Luning Xia, Zhan Wang, Jingqiang Lin, Guozhu Zhang and Yafei Ji Institute.
Hardware Support for Trustworthy Systems Ted Huffmire ACACES 2012 Fiuggi, Italy.
Physically Unclonable Function– Based Security and Privacy in RFID Systems Leonid Bolotnyy and Gabriel Robins Dept. of Computer Science University of Virginia.
Cryptanalysis and Improvement of an Access Control in User Hierarchy Based on Elliptic Curve Cryptosystem Reporter : Tzer-Long Chen Information Sciences.
Shanti Bramhacharya and Nick McCarty. This paper deals with the vulnerability of RFIDs A Radio Frequency Identifier or RFID is a small device used to.
RF network in SoC1 SoC Test Architecture with RF/Wireless Connectivity 1. D. Zhao, S. Upadhyaya, M. Margala, “A new SoC test architecture with RF/wireless.
Dr. Fei Hu { Department of Electrical and Computer Engineering University of Alabama Tuscaloosa, Alabama Introduction to.
On-Chip Sensors for Process, Aging, and Temperature Variation
Physical-layer Identification of UHF RFID Tags Authors: Davide Zanetti, Boris Danev and Srdjan Capkun Presented by Zhitao Yang 1.
Digital Watermarking -Project Proposal (EE5359: Multimedia processing) Under the Guidance of Dr. K. R. Rao Submitted by: Ehsan Syed
A paper by: Paul Kocher, Joshua Jaffe, and Benjamin Jun Presentation by: Michelle Dickson.
A High-Speed Hardware Implementation of the LILI-II Keystream Generator Paris Kitsos...in cooperation with Nicolas Sklavos and Odysseas Koufopavlou Digital.
Hardware Trojan (HT) Detection in 3-D IC Wafi Danesh Instructor: Dr. Christopher Allen EECS 713 High-Speed Digital Circuit Design Final Project Presentation.
Basics and Principles of Scientific Research By Ass. Prof. Dr. Majid S. Naghmash Diglah University College Department of Computer Engineering Techniques.
DEFENSE EXAMINATION GEORGIA TECH ECE P. 1 Fully Parallel Learning Neural Network Chip for Real-time Control Jin Liu Advisor: Dr. Martin Brooke Dissertation.
Hashes Lesson Introduction ●The birthday paradox and length of hash ●Secure hash function ●HMAC.
Design of Physically Unclonable Functions Using FPGAs
IT 221: Introduction to Information Security Principles Lecture 5: Message Authentications, Hash Functions and Hash/Mac Algorithms For Educational Purposes.
POWER OPTIMIZATION IN RANDOM PATTERN GENERATOR By D.Girish Kumar 108W1D8007.
T EXT D IGITAL W ATERMARKING O F A M ALAYALAM T EXT D OCUMENT B ASED O N F RAGMENTS R EGROUPING S TRATEGY. Guide:Presented by: Mrs.Sreeja Sasinas Alias.
On the Synthesis of Side-Channel resistant Cryptographic Modules Sorin Alexander Huss Integrated Circuits and Systems Lab Computer Science Department Technische.
Protect Your Hardware from Hacking and Theft
Post-Silicon Calibration for Large-Volume Products
An Improved Novel Key Management Protocol for RFID Systems
Physical Unclonable Functions and Applications
Cross-layer Analysis for detecting Wireless Misbehavior
presented by Fabian Schläfli
Presentation transcript:

Novel Reconfigurable Silicon Physical Unclonable Functions Yingjie Lao and Keshab K. Parhi Department of Electrical and Computer Engineering University of Minnesota, Twin Cities April 11 th, 2011 FDSCPS 2011

Outline Summary and Future Work 4. Experimental Results 3. Solutions 2. Introductions 1.

Motivation “It is estimated that as much as 10% of all high-tech products sold globally are counterfeit which leads to a conservative estimate of $100 billion of revenue loss.” [Guajardo et al, 2008] Several invasive and semi-invasive physical tampering methods have been developed, which made it possible to learn the ROM- based keys through attacks and compromise systems by using counterfeit copies of the secret information.

Introduction Physical Unclonable Functions(PUFs) -a function which is an innovative circuit primitive that exploits the unique intrinsic uncontrollable physical features which are introduced by manufacturing process variations. Physical Objects Process Variations Unpredictable Behavior Easy to Evaluate Hard to Clone PUFPUF Anti-counterfeiting marks for ICs

Previous Work  Ravikanth et. al proposed the first PUF in literature in After that, several research groups have developed a variety types of PUFs. At the same time, commercialization of the PUFs also has led to some startups. S-RAM PUF [Guajardo et al., Su et al. 2007] MUX Silicon PUF [Gassend et al. 2002] FPGA "butterfly“ PUF [Kumar et al. 2008] Ring Oscillator Silicon PUF [Edward et al. 2002]

Problem for Static PUF Reconfigurable PUF: updatable Challenge-like Vulnerable to attacks & Poor performance. The frequencies of ring oscillators can be evaluated by attackers Reconfigurable RO Silicon PUF Hard to implement: lower level design detail, symmetrical routing FPGA based Reconfigurability for PUF is desirable: 1.To updatable authentication keys 2.To improve the security, as we can reconfigure the challenge- response behaviors

Outline Summary and Future Work 4. Experimental Results 3. Solutions 2. Introductions 1.

Solutions  Non-FPGA based methods 1.Reconfigurable Challenge- Response Behaviors PUF n (Challenge)Response 2. Reconfigurable PUF Circuits

Method One (I)  LFSR (Linear Feedback Shift Register)  Hash Function Pre-process Challenge - To generate new sets of challenge bits, while ensure the security

Method One (II) Output Recombination  Similar idea used in prior Ring Oscillator PUF No correlation among different outputs

Method Two (I) Reconfigurable Feed-Forward PUF Why feed-forward? - Add nonlinearity into PUF, make it hard to model, improve the security Types of feed-forward? 1.Feed-forward Cascade 2.Feed-forward Overlap 3.Feed-forward Separate [Lee et al, 2004]

Method Two (I) Reconfigurable Feed-Forward PUF - Can be configured among the 3 different types of feed-forward structures

Method Two (II) MUX and DeMUX PUF - Can choose to skip some stages instead of propagating the rising edge signal successively

Outline Summary and Future Work 4. Experimental Results 3. Solutions 2. Introductions 1.

Experiment Methodology -SPICE Simulation -65nm technology -Parameter Model from SSTA (Statistical Static Timing Analysis)  Measurements: -Security: Inter-Chip Variations -Reliability: Intra-Chip Variations -Reconfigurability

Result I Structures Inter-chip VariationIntra-chip Variation MaxMinMaxAvg Non-feed- forward 59%22%13%5.8% Feed-forward Overlap 66%27%15%8.7% Feed-forward Cascade 64%25%20%10.7% Feed-forward Separate 65%26%17%9.9% Reconfigurable Feed-forward 65%25%19%10.3% MUX and DeMUX57%23%16%7.1% *Variation is the Hamming Distance of two digital responses divided by the total bit length ( challenge and response both have 100 bits in our simulation)

Result II Structures Reconfigurability MaxAvgMin Challenge LFSR44%34.6%28% Challenge Hash42%28.3%19% Output Recombination57%38.9%25% Reconfigurable Feed- forward 47%32.4%22% MUX and DeMUX33%24.7%13% *Reconfigurability is the Hamming Distance of two digital responses, which we generated by only altering the configure data but fixing the challenge bits, then divided by the total bit length ( Used to test the randomness )

Outline Summary and Future Work 4. Experimental Results 3. Solutions 2. Introductions 1.

Summary  Problem: reconfigurable PUF  Novel non-FPGA based methods: - Reconfigurable CRPs - Reconfigurable PUF circuits  Simulation results validated proposed structures  Also take the reliability and the security into consideration: - Reconfigurable feed-forward MUX PUF has the best performance!

Future Work  Strong authentication scheme for reconfigurable PUFs  Examine the properties of reconfigurable PUFs by mathematical methods  Improve the reliability and the security of reconfigurable PUFs

LOGO

References [1] R. Pappu, B. Recht, J. Taylor, and N. Gershenfeld, “Physical one-way functions.” Science, vol. 297(5589), p. 2026, [2] B. Gassend, D. Clarke, M. V. Dijk, and S. Devadas, “Silicon physical unclonable functions,” the 9th ACM Conference on Computer and Communications Security, p. 160, [3] ——, “Controlled physical unclonable functions,” in Computer Security Application Conference, 2002, pp. 149–160. [4] S. Kumar, J. Guajardo, R. Maesyz, G. Schrijen, and P. Tuyls, “Extended abstract: The butterfly PUF protecting IP on every FPGA,” Hardware-Oriented Security and Trust (HOST 2008), pp. 67–70, [5] R. Maes, P. Tuyls, and I. Verbauwhede, “Intrinsic PUFs from flip-flops on reconfigurable devices,” in Benelux Workshop Information and System Security (WISSec 08), [6] D. E. Holcomb, W. P. Burleson, and K. Fue, “Initial SRAM state as a fingerprint and source of true random numbers,” in Conference on RFID Security, [7] U. Ruhrmair, F. Sehnke, J. Solter, G. Dror, S. Devadas, and J. Schmidhuber, “Modeling attacks on physical unclonable functions,” in Conference on RFID Security, [8] M. Majzoobi, F. Koushanfar, and M. Potkonjak, “Techniques for design and implementation of secure reconfigurable PUFs,” ACM Transactions on Reconfigurable Technology and Systems, vol. 2, no. 1, pp. 1–33, [9] D. Lim, J. W. Lee, B. Gassend, G. E. Suh, M. V. Dijk, and S. Devadas, “Extracting secret keys from integrated circuits,” IEEE Transaction on Very Large Scale Integration Systems, vol. 13, no. 10, p. 1200, [10] H. Chang and S. Sapatnekar, “Statistical timing analysis considering spatial correlation in a pert- like traversal,” in IEEE International Conference Computer-Aided Design Integrated Circuits and Systems, 2003, pp. 621–625. [11] J.-W. Lee, D. Lim, B. Gassend, G. E. Suh, M. van Dijk, and S. Devadas, “A technique to build a secret key in integrated circuits with identification and authentication applications,” in IEEE International Conference Computer-Aided Design Integrated Circuits and Systems, 2003, pp. 621– 625.

References [12] K. Kursawe, A. Sadeghi, D. S. B. Skoric, and P. Tuyls, “Reconfigurable physical unclonable functions – enabling technology for tamper-resistant storage,” in 2nd IEEE International Workshop on Hardware-Oriented Security and Trust(HOST), 2009, pp. 22–29. [13] A. M. S. Morozov and P. Schaumont, “An analysis of delay based PUF implementations on FPGA,” Springer, pp. 382–387, [14] D. Merli, F. Stumpf, and C. Eckert, “Improving the quality of ring oscillator PUFs on FPGAs,” in WESS ’10 Proceedings of the 5th Workshop on Embedded Systems Security, [15] J. Guajardo, S. S. Kumar, G.-J. Schrijen, and P. Tuyls, “FPGA intrinsic PUFs and their use for IP protection,” Cryptographic Hardware and Embedded Systems, [16] J. Cong, “Challenges and opportunities for design innovations in nanometer technologies,” SRC Design Science Concept Paper, [17] S. Nassif, “Delay variability: Sources, impact and trends,” in Solid-State Circuits Conference, 2000, pp. 368–369. [18] L. Alaus, D. Noguet, and J. Palicot, “A reconfigurable linear feedback shift register operator for software defined radio terminal,” IEEE International Symposium on Wireless Pervasive Computing, [19] P. Kitsos, N. Sklavos, N. Zervas, and O. Koufopavlou, “A reconfigurable linear feedback shift register (LFSR) for the bluetooth system,” in IEEE International Conference on Electronics, Circuits and Systems (ICECS), [20] M. Zeghida, B. Bouallegue, A. Baganne, and M. Machhout, “A reconfigurable implementation of the new secure hash algorithm,” Second International Conference on Availability, Reliability and Security (ARES), pp. 281–285, [21] B. Gassend, D. Clarke, M. V. Dijk, and S. Devadas, “Silicon physical random functions,” in ACM Conference on Computer and Communications Security, 2002, pp. 148–160.