Home Exam 1: Video Encoding on Intel x86 using Streaming SIMD Extensions (SSE) and Advanced Vector Extensions (AVX) Home Exam 1: Video Encoding on Intel x86 using Streaming SIMD Extensions (SSE) and Advanced Vector Extensions (AVX) August 22 nd 2014 INF5063: Programming heterogeneous multi-core processors … because the OS-course is just to easy! Håkon Kvale Stensland

INF5063, Pål Halvorsen, Carsten Griwodz, Håvard Espeland, Håkon Stensland University of Oslo Video Encoding Pål wants to encode some videos on his computer… Pål wants to spend all his budget on a new PowerPoint 2013 license, so new hardware or a H.264 licence is out of the question! It is therefore your task to make the encoder as efficient as possible on a single core (the rest of the cores are occupied running PowerPoint animations).

INF5063, Pål Halvorsen, Carsten Griwodz, Håvard Espeland, Håkon Stensland University of Oslo Codec63 Codec63 is basically MJPEG with intra-frame dependencies. It adds Motion Estimation and Motion Compensation from the MJPEG example. It has a more efficient DCT implementation (1D vs. 2D) Will be the basis for all three home exams in the course. The precode that is handed out today is a basic single threaded Codec63 encoder and decoder written in C.

INF5063, Pål Halvorsen, Carsten Griwodz, Håvard Espeland, Håkon Stensland University of Oslo Precode You are not allowed to change out the Motion Estimation, Motion Compensation or DCT algorithms. You are not allowed to paste code from other projects / encoders. You can use your own machines for this assignment, but you have to make sure that the code works on the machines at the Simula network You only need to optimize the Codec63 encoder! Your implementation is supposed to be single threaded, and optimized to use the instruction level parallelism available in a single x86 core.

INF5063, Pål Halvorsen, Carsten Griwodz, Håvard Espeland, Håkon Stensland University of Oslo Your task Utilize the instruction level parallelism (ILP), CPU vector unit and other tricks to get the most performance out of a single core. Start by profiling the encoder to see which parts of the encoder that are the bottlenecks. Remember, after optimizing one part of the code, more profiling might be needed to find new bottlenecks. Write a scientific report with details on which parts of the encoding process that benefited from your optimizations. The report should also explain how your code works. Remember to also report on optimization that did not work as you expected!

INF5063, Pål Halvorsen, Carsten Griwodz, Håvard Espeland, Håkon Stensland University of Oslo How are you evaluated? Make sure that your implementation compiles and run, and that it can produce correct video output (we also check the motion prediction). The use of the parallelization potential (SIMD) in a x86 CPU for: Motion Estimation, Motion Compensation and DCT/iDCT. Quality of the report. Is profiling of the code done between the different steps and how are the different optimization attempts documented and discussed in the report. Presentation of your solution on a “poster session” is required to pass the exam!

INF5063, Pål Halvorsen, Carsten Griwodz, Håvard Espeland, Håkon Stensland University of Oslo Formal Information  Deadline: Thursday September 18 th – 12:00  The assignment will be graded, and count 33% of the final grade.  Deliver your code, report and poster to:  Prepare a poster (two A3 pages) and a short talk (2 minutes without slides) to pitch your poster for the class (September 19 th ). Best poster & presentation will be awarded!

INF5063, Pål Halvorsen, Carsten Griwodz, Håvard Espeland, Håkon Stensland University of Oslo Last but not least!  Codec63 precode available for download in git. Clone the repository and work on you own local version. git clone  Bugs in the code can be reported in Bitbucket’s issue tracking system, or on ( inf5063 at ifi.uio.no )

Good Luck! PS! Start early!