[ 1 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici LVDS links

[ 2 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici LVDS overview What is LVDS  Low Voltage Differential Signaling (LVDS) A method to communicate data using a very low voltage swing (350 mV) over differential Printed Circuit Board (PCB) traces or balanced cables  I/O signal levels are defined by ANSI/TIA/EIA-644 Standard specifies LVDS as a way to transmit and receive hundreds of megabits per second per channel over differential media  Primarily a point to point interface Why differential signaling  Benefits Low noise Smooth current mode outputs and low demand on power/ground Differential fields tend to couple, reducing EMI Noise picked up on differential lines is rejected by the receiver as a common mode  High speed  Low power consumption Virtually flat versus frequency 10% of the power required for ECL

[ 3 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici ANSI/TIA/EIA-644 specs The ANSI/TIA/EIA-644 standard 1.0V V OL

[ 4 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici LVDS driver LVDS driver consists of a current source output which drives a closely- coupled (closely-spaced) differential pairs of conductors  Termination resistor at the receiver which matches the differential impedance of the transmission line completes the current loop The direction of current flow determines the logic level at the receiver

[ 5 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici Cable ground and shield connections Cable shielding and ground return wires help for EMC compliance  The shield reduces the EMI  The ground return wire provide a small return path for common-mode currents The network prevents DC current flow in the shield

[ 6 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici LVDS signal quality: the eye diagram method Common methods to measure LVDS signal quality are:  rise time measurement at the load;  Jitter measurement in an eye pattern;  Bit Error Rate (BER) measurement Eye pattern is used to measure the effects of inter- symbol interference on random data and allows a good estimation of the jitter  A transition high after a long series of low has a slower rise time than the rise time of a periodic waveform due to the low pass filter effects of the cable.

[ 7 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici LVDS signal quality: NRZ data eye pattern NRZ coding; frequency increased until measured jitter equaled 20% with respect to the unit interval for the particular cable length; 0 V and ± 100 mV differential voltage receiver thresholds.

[ 8 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici LVDS signal quality: Jitter measurements results (National) t tcs t tcs t tcs = peak-to-peak threshold crossing jitter

[ 9 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici LVDS signal quality: noise margin & device protection The common mode range  The common-mode range is +/-1V around the driver offset voltage (+1.25V typical). This supports the input operating range of GND to +2.4V on the receivers. M-LVDS supports a typically common mode of +/-2V. Noise margin  Noise margin is related to the +/-1V common mode range of LVDS. Since noise will be coupled as common-mode, the receivers will reject it. Input/Output protection network

[ 10 ] LVDS links Servizio Elettronico Laboratori Frascati INFN - Laboratori Nazionali di Frascati G. Felici LVDS signal quality: noise margin & device damage Maximum rating Comments  For 15 m cable length we can (probably) cope with threshold crossing jitter  On-detector and off-detector ground difference must be minimized to avoid noise margin reduction and device failure/damaging  Protection network must be added if not foreseen in the driver and/or receiver side chip