Introduction to VLSI Programming TU/e course 2IN30 Lecture 3: Control Handshake Circuits (2) Prof.dr.ir Kees van Berkel [Dr. Johan Lukkien] [Dr.ir. Ad Peeters]

Philips Research, Kees van Berkel, Ad Peeters, TU/e Time table 2005 dateclass | labsubject Aug. 302 | 0 hoursintro; VLSI Sep. 63 | 0 hourshandshake circuits Sep. 133 | 0 hourshandshake circuits assignment Sep. 203 | 0 hoursTangram Sep. 27no lecture Oct. 4 no lecture Oct. 111 | 2 hoursdemo, fifos, registers | deadline assignment Oct. 181 | 2 hoursdesign cases; Oct. 251 | 2 hoursDLX introduction Nov. 11 | 2 hourslow-cost DLX Nov. 81 | 2 hourshigh-speed DLX Nov. 29deadline final report

Philips Research, Kees van Berkel, Ad Peeters, TU/e Last Week – Lecture 2

Philips Research, Kees van Berkel, Ad Peeters, TU/e VLSI metrics dimensionless quantities (0.12  m CMOS): Aareagate equivalent (8  m 2, or 120,000 geq/mm 2 ) Ttimegate delay (0.2 nanosecond) Eenergytransition (0.5 picojoule)

Philips Research, Kees van Berkel, Ad Peeters, TU/e Handshake signaling active sidepassive side request a r acknowledge a k request a r time event sequence: a r  a k  a r  a k 

Philips Research, Kees van Berkel, Ad Peeters, TU/e Useful shorthands Four-phase handshakes –a  = [ar] ; ak  ; [  ar] ; ak  –a  = ar  ; [ak] ; ar  ; [  ak] Two-phase handshakes –a  = [ar] ; ak  –a  = [  ar] ; ak  –a   = ar  ; [ak] –a   = ar  ; [  ak]

Philips Research, Kees van Berkel, Ad Peeters, TU/e Some handshake components Repeater : [a  :  [b   ; b   ] ] Mixer :  [ [ a  : c   ; [a  : c   ] [] b  : c   ; [b  : c   ] ] ] Sequencer :  [[a  : (b   ; b   ; c   ) ] ; [a  : c   ]]  a b a ; b c | a c b

Philips Research, Kees van Berkel, Ad Peeters, TU/e Handshake components: realization From handshake notation to gate network in 8 steps: 1 Specify component in handshake notation. 2 Expand to individual boolean variables (wires). 3 Introduce auxiliary state variables (if required). 4 Derive a set of production rules that implements this refined specification. 5 Make production rules more symmetric (cheaper). 6 Verify isochronic forks. 7 Verify initialization constraints. 8 Analyze time, area, and energy.

Philips Research, Kees van Berkel, Ad Peeters, TU/e Mixer realization Behavior:  [ [ a  : c   ; a  : c   [] b  : c   ; b  : c   ] ] Restriction:  a r   b r must hold at all times! Expansion:  [ [ [a r ] ; c r  ; [c k ] ; a k  ; [  a r ] ; c r  ; [  c k ] ; a k  [] [b r ] ; c r  ; [c k ] ; b k  ; [  b r ] ; c r  ; [  c k ] ; b k  ] ] a c b |

Philips Research, Kees van Berkel, Ad Peeters, TU/e Mixer realization Production rules: a r  c k  a k  b r  c k  b k   c k  a k   c k  b k  a r  b r  c r   a r   b r  c r  More symmetric production rules: a r  c k  a k  a r  c k  a k   a r   c k  a k   a r   c k  a k  premature a k  more expensive | a c b

Philips Research, Kees van Berkel, Ad Peeters, TU/e Mixer realizations Mixer: area, delay, energy Area: 6 gate equivalents Delay per cycle: 8 gate delays Energy per cycle: 8 transitions

Philips Research, Kees van Berkel, Ad Peeters, TU/e This Week – Lecture 3

Philips Research, Kees van Berkel, Ad Peeters, TU/e Join realization Behavior:  [ [ a  : b  : c   ; a  : b  : c   ] ] Expansion:  [ [ a r ] ; [ b r ] ; c r  ; [ c k ] ; b k  ; a k  ; [  a r ] ; [  b r ] ; c r  ; [  c k ] ; b k  ; a k  ] =  [ [ a r  b r ] ; c r  ; [ c k ] ; b k , a k  ; [  a r  b r ] ; c r  ; [  c k ] ; b k , a k  ] a c b 

Philips Research, Kees van Berkel, Ad Peeters, TU/e Join realization *[ [ a r  b r ] ; c r  ; [ c k ] ; b k , a k  ; [  a r  b r ] ; c r  ; [  c k ] ; b k , a k  ] Production rules: c k  a k  c k  b k   c k  a k   c k  b k  a r  b r  c r   a r   b r  c r  fork C-element a c b 

Philips Research, Kees van Berkel, Ad Peeters, TU/e Join realization c k  a k  c k  b k   c k  a k   c k  b k  a r  b r  c r   a r   b r  c r  Join: area, delay, energy Area: 2 gate equivalents Delay per cycle: 4 gate delays Energy per cycle: 4 transitions C arar brbr crcr ckck akak bkbk

Philips Research, Kees van Berkel, Ad Peeters, TU/e Sequencer realization Specification:  [(a  : (b   ; b   ; c   ) ) ; (a  : c   )] Expansion:  [ [a r ] ; b r  ; [b k ] ; b r  ; [  b k ] ; c r  ; [c k ] ; a k  ; [  a r ] ; c r  ; [  c k ] ; a k  ] a ; b c

Philips Research, Kees van Berkel, Ad Peeters, TU/e Expansion Sequencer:  [ [a r ] ; b r  ; [b k ] ; b r  ; [  b k ] ; c r  ; [c k ] ; a k  ; [  a r ] ; c r  ; [  c k ] ; a k  ] Sequencer realization decompose into wire  c k  a k ,  c k  a k  and a remainder (S-element):  [ [a r ] ; b r  ; [b k ] ; b r  ; [  b k ] ; c r  ; [  a r ] ; c r  ]

Philips Research, Kees van Berkel, Ad Peeters, TU/e Sequencer realization Expansion S-element:  [ [a r ] ; b r  ; [b k ] ; b r  ; [  b k ] ; c r  ; [  a r ] ; c r  ] Production rules S-element ?: a r  b r   b k  c r  b k  b r   a r  c r  What is wrong?

Philips Research, Kees van Berkel, Ad Peeters, TU/e Sequencer realization Introduction of auxiliary state variable x  [ [ a r ] ; b r  ; [b k ] ; x  ; [x] ; b r  ; [  b k ] ; c r  ; [  a r ] ; x  ; [  x] ; c r  ] Production rules S-element: a r  b k  x  x  a r  b r  x   b k  c r   a r  x  x   a r  b r  x  b k  c r  Note: a r in guard for x  to prevent conflicts during initialization

Philips Research, Kees van Berkel, Ad Peeters, TU/e Sequencer realization using state-transition tables (1)  [ [a r ] ; b r  ; [b k ] ; b r  ; [  b k ] ; c r  ; [c k ] ; a k  ; [  a r ] ; c r  ; [  c k ] ; a k  ] State encoding not unique

Philips Research, Kees van Berkel, Ad Peeters, TU/e Sequencer realization using state-transition tables (2)  [ [a r ] ; b r  ; [b k ] ; x  ; [x] ; b r  ; [  b k ] ; c r  ; [c k ] ; a k  ; [  a r ] ; x  ; [  x] ; c r  ; [  c k ] ; a k  ] State encoding unique

Philips Research, Kees van Berkel, Ad Peeters, TU/e Sequencer realization using state-transition tables (3) a r  b k  x   a r  x  a k  c k   a k  c k  Note: a r in guard for x  to prevent conflicts during initialization

Philips Research, Kees van Berkel, Ad Peeters, TU/e Sequencer realization using state-transition tables (4) a r   x  b r   a r  x  b r   b k  x  c r  b k   x  c r 

Philips Research, Kees van Berkel, Ad Peeters, TU/e Sequencer realization Sequencer: area, delay, energy Area: 5 gate equivalents Delay per cycle: 12 gate delays (8 with optimized C-element) Energy per cycle: 12 transitions (10 with optimized C-element) xx arar bkbk brbr crcr ckck akak

Philips Research, Kees van Berkel, Ad Peeters, TU/e Time for a break

Philips Research, Kees van Berkel, Ad Peeters, TU/e Parallel realization  [ a  : ((b   ; b   ) || (c   c   )) ; a  ] Cf. Join component Expansion:  [ [a r ] ; ( (b r  ; [b k ] ; b r  ; [  b k ]) || (c r  ; [c k ] ; c r  ; [  c k ]) ) ; a k  ; [  a r ] ; a k  ] a || b c

Philips Research, Kees van Berkel, Ad Peeters, TU/e Parallel realization  [ a  : ( (b   ; b   ) || (c   c   ) ) ; a  ] Expansion:  [ [a r ] ; ( (b r  ; [b k ] ; b r  ; [  b k ]) || (c r  ; [c k ] ; c r  ; [  c k ]) ) ; a k  ; [  a r ] ; a k  ] Auxiliary variables x,y:  [ [a r ] ; ( (b r  ; [b k ] ; x  ; [x] ; b r  ; [  b k ]) || (c r  ; [c k ] ; y  ; [y] ; c r  ; [  c k ]) ) ; a k  ; [  a r ] ; x , y  ; [  x  y] ; a k  ] a || b c

Philips Research, Kees van Berkel, Ad Peeters, TU/e Parallel realization  [ [a r ] ; ( (b r  ; [b k ] ; x  ; [x] ; b r  ; [  b k ]) || (c r  ; [c k ] ; y  ; [y] ; c r  ; [  c k ]) ) ; a k  ; [  a r ] ; x , y  ; [  x  y] ; a k  ] Production rules: b k  x  c k  y   a r   b k  x   a r   c k  y  a r   x  b r  a r   y  c r   a r  x  b r   a r  y  c r  x  y  a k   x   y  a k  reshuffling applied to a k 

Philips Research, Kees van Berkel, Ad Peeters, TU/e Modulo-N counter Specification (regular expression): (a N b)* N=1: repeater + sequencer N>1: rewrite spec as: (a N mod 2 (a 2 ) N div 2 b)* Specification Header: (a N mod 2 (a a 2 )* b b)* Head N mod 2 Modulo (N div2) counter a b a b

Philips Research, Kees van Berkel, Ad Peeters, TU/e Modulo-N counter: Header Rewriting specification of Header cell (L = N mod 2): (a L (a a 2 )* b b)* = ( (a L a a 2-L )* a L b b)* = ( a L a a 2-L + a L b b)* = ( a L ( a a 2-L + b b) )*

Philips Research, Kees van Berkel, Ad Peeters, TU/e Modulo-N counter: Header For N is odd (i.e. L=1) forever do a ; sel a ; a [] b ; b les od Rewriting ( a L ( a a 2-L + b b) )* in Tangram For N is even (i.e. L=0) forever do sel a ; a ; a [] b ; b les od

Philips Research, Kees van Berkel, Ad Peeters, TU/e Header: handshake circuit L=0L=1

Philips Research, Kees van Berkel, Ad Peeters, TU/e Selector (specification)  [ (a  :[ b  : x  ; b  ; d   [] c  : x  ; c  ; e   ] ) ; (a  : [x  d   []  x  e   ] ) ] a [|][|] c e d b

Philips Research, Kees van Berkel, Ad Peeters, TU/e Self initialization Initialization problem: how to force (gate-level) handshake circuit into an initial state? Aim: self initialization: –no “reset” wire –circuit proceeds to initial state when all inputs low.

Philips Research, Kees van Berkel, Ad Peeters, TU/e Self initialization: requirements Component specification: R1. Initial state of component must be quiescent. R2. Component must be “initial when closed”. Component implementations: R3. When all inputs low, component must become initial. R4. When  passive inputs low,  active outputs become low. Handshake circuit: R5. Activity graph must be acyclic (nodes: components; edges: act  pas directed channels)

Philips Research, Kees van Berkel, Ad Peeters, TU/e Self initialization: theorem A handshake circuit satisfying R5 and with component satisfying R1 - R4 is self initializable. All Tangram handshake components satisfy R1-R4. All compiled handshake circuits satisfy R5.

Philips Research, Kees van Berkel, Ad Peeters, TU/e Self initialization: proof (induction) i A°  i B   i D°  i E   G satisfies R4  o B   o C   H satisfies R3; o C  = i C°  o C°  o D°  o E   G satisfies R3  o A° GH A° D° C° BB CC EE R5 allows decomposition:  all handshake. wires low   R2, R1  all handshake. components initial

Philips Research, Kees van Berkel, Ad Peeters, TU/e Excercise: selector realization  [ (a  :[ b  : x  ; b  ; d   [] c  : x  ; c  ; e   ]) ; (a  : [x  d   []  x  e   ] ) ] a [|][|] c e d b Follow the 8 realization steps!! (it is ok to skip the isochronic-fork analysis) Note: x is a specification variable and is not necessarily part of a realization.

Philips Research, Kees van Berkel, Ad Peeters, TU/e Assignment : duplicator realization Behavior:  [[a  : (b   ; b   ; b   ) ] ; [a  : b   ]] Required:realization with 2 sequential gates. (sequencer + mixer requires 3 sequential gates) Follow the 8 realization steps!! (it is ok to skip the isochronic-fork analysis) Add comparison with sequencer+mixer realization. #2 a b

Philips Research, Kees van Berkel, Ad Peeters, TU/e Next week: lecture 4 Outline: Data encoding; push and pull handshakes Tangram assignment command Handshake components: handshake latch, transferrer, multiplexer, adder Handshake circuits & Tangram programs: fifo buffers and shift registers