Data and Computer Communications Tenth Edition by William Stallings Data and Computer Communications, Tenth Edition by William Stallings, (c) Pearson Education.

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Presentation transcript:

Data and Computer Communications Tenth Edition by William Stallings Data and Computer Communications, Tenth Edition by William Stallings, (c) Pearson Education - Prentice Hall, 2013

Advanced Data Communications Topics CHAPTER 16

“Life in the modern world is coming to depend more and more upon technical means of communication. Without such technical aids the modern city-state could not exist, for it is only by means of them that trade and business can proceed; that goods and services can be distributed where needed; that railways can run on schedule; that law and order are maintained; that education is possible. Communication renders true social life practicable, for communication means organization.” “Life in the modern world is coming to depend more and more upon technical means of communication. Without such technical aids the modern city-state could not exist, for it is only by means of them that trade and business can proceed; that goods and services can be distributed where needed; that railways can run on schedule; that law and order are maintained; that education is possible. Communication renders true social life practicable, for communication means organization.” —On Human Communication, Colin Cherry

Analog Data, Analog Signals  There are two principal reasons for analog modulation of analog signals: A higher frequency may be needed for effective transmission A higher frequency may be needed for effective transmission Modulation permits frequency-division multiplexing Modulation permits frequency-division multiplexing Principal techniques for modulation using analog data are: Amplitude modulation (AM) Frequency modulation (FM) Phase modulation (PM)

Angle Modulation  Special cases are frequency modulation (FM) and phase modulation (PM)  For phase modulation the phase is proportional to the modulating signal  For frequency modulation the derivative of the phase is proportional to the modulating signal

Cyclic Codes  Many of the error-correcting block codes that are in use are in this category This class of codes can be easily encoded and decoded using linear feedback shift registers (LFSRs) This class of codes can be easily encoded and decoded using linear feedback shift registers (LFSRs) Bose-Chaudhuri-Hocquenghem (BCH) and Reed-Solomon are examples Bose-Chaudhuri-Hocquenghem (BCH) and Reed-Solomon are examples  LFSR implementation is the same as that of the CRC (cyclic redundancy check) error-detecting code Key difference is that the CRC code takes an input of arbitrary length and produces a fixed-length CRC check code while a cyclic error-correcting code takes a fixed- length input and produces a fixed-length check code Key difference is that the CRC code takes an input of arbitrary length and produces a fixed-length CRC check code while a cyclic error-correcting code takes a fixed- length input and produces a fixed-length check code

Decoding of a Cyclic Code  The following procedure is used: Process received bits to compute the syndrome code in exactly the same fashion as the encoder processes the data bits to produce the check If the syndrome bits are all zero, no error has been detected If the syndrome is nonzero, perform additional processing on the syndrome for error correction

Table 16.1 A Single-Error-Correcting (7, 4) Cyclic Code

BCH Codes  Among the most powerful cyclic block codes  Widely used in wireless applications  Provide flexibility in the choice of parameters (block length, code rate)  For any positive pair of integers m and t, there is a binary (n,k) BCH code with the following parameters: Block length: n = 2 m – 1 Block length: n = 2 m – 1 Number of check bits: n - k ≤ mt Number of check bits: n - k ≤ mt Minimum distance: d min ≥ 2t + 1 Minimum distance: d min ≥ 2t + 1

Table 16.2 BCH Code Parameters

Table 16.3 BCH Polynomial Generators

Reed-Solomon Codes (RS)  Widely used subclass of nonbinary BCH codes  Data are processed in chunks of m bits called symbols  An (n,k) RS code has the following parameters: Symbol length: m bits per symbol Symbol length: m bits per symbol Block length: n = 2 m - 1 symbols = m(2 m - 1) bits Block length: n = 2 m - 1 symbols = m(2 m - 1) bits Data length: k symbols Data length: k symbols Size of check code: n - k = 2t symbols = m(2t) bits Size of check code: n - k = 2t symbols = m(2t) bits Minimum distance: d min = 2t + 1 symbols Minimum distance: d min = 2t + 1 symbols

Parity-Check Matrix Codes  Forward error correction (FEC)  Low-density parity-check code (LDPC) Exhibit performance in terms of bit error probability that is very close to the Shannon limit and can be efficiently implemented for high-speed use Exhibit performance in terms of bit error probability that is very close to the Shannon limit and can be efficiently implemented for high-speed use Used in: Used in: High-speed wireless specificationsHigh-speed wireless specifications n and ac Wi-Fi802.11n and ac Wi-Fi Satellite digital television transmissionSatellite digital television transmission 10-Gbps Ethernet10-Gbps Ethernet

Parity-Check Code  For a parity-check code there are three functions to perform: For a given set of k data bits, generate the corresponding n–bit codeword Encoding For a given codeword, determine if there are one or more bits in error Error detection If an error is detected, perform error correction Error correction

Table 16.4 (7, 4) Parity Check Code Defined by Equation (16.15)

LDPC Codes  Low-Density Parity-Check Codes  Parity-check code with parity-check matrix H with the following properties:  Because of property 4, H has a small density of 1s The elements of H are almost all equal to 0 The elements of H are almost all equal to 0 Hence the designation low density Hence the designation low density 1. Each row of H contains wr 1s 2. Each column of H contains wc 1s 3. The number of 1s in common between any two columns is zero or one 4. Both wr and wc are small compared to the codeword and the number of rows

Figure 16.6 Examples of LDPC Parity-Check Matrices

Error Correction  Error detection of an LDPC code can be performed using the parity-check matrix If Hc T yields a nonzero vector, then an error is detected If Hc T yields a nonzero vector, then an error is detected  Tanner graph Contains two kinds of nodes Contains two kinds of nodes Check nodes which correspond to rows of HCheck nodes which correspond to rows of H Bit nodes which correspond to columns of H and hence to the bits of the codewordBit nodes which correspond to columns of H and hence to the bits of the codeword

Table 16.5 Example Error Correction Technique for LDPC of Figure 16.7

Summary  Analog data, analog signals Amplitude modulation Amplitude modulation Angle modulation Angle modulation  ARQ performance issues Stop-and-wait flow control Stop-and-wait flow control Error-free sliding- window flow control Error-free sliding- window flow control ARQ ARQ  Forward error- correcting codes Cyclic codes BCH codes Reed-Solomon codes Parity-check matrix codes Low-density parity- check codes