May 16, 20001. 2 USB 2.0 Compliance And Tools Kosta Koeman Software Engineer Intel Architecture Labs Intel.

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Presentation transcript:

May 16, 20001

2 USB 2.0 Compliance And Tools Kosta Koeman Software Engineer Intel Architecture Labs Intel

May 16, Agenda w History w Goal of the program w Comparison of USB 1.1 and USB 2.0 w Similarities with USB 1.1 Compliance Program w Differences with USB 1.1 Compliance Program

May 16, History w USB 1.1 Compliance Program – Long evolution from 1996 (USB 1.0) to today (2000) S3 Inrush Signal Quality, S1 USBCheck, Hidview, Interoperability Chap 11, OHCI, Current Chap 9, UHCI, Drop/Droop S3 Inrush Signal Quality, S1 USBCheck, Hidview, Interoperability Chap 11, OHCI, Current Chap 9, UHCI, Drop/Droop ‘96 Year TestingTesting TestingTesting LevelLevel LevelLevel ‘97 ‘98 ‘99 ‘00 ‘01

May 16, Evolution of the Program w The USB 2.0 Compliance Program is an extension of the USB 1.1 Compliance Program. – Years of experience – Tools already in place w What this means… USB 2.0 Compliance Program Will Start at a High Level! Today Tomorrow USB2.0 USB1.1

May 16, Goal of the Program w Solid, robust testing at a higher frequency w How will this be accomplished? – Leverage the experience and testing infrastructure from the USB 1.1 Compliance Program – Modify current tools – Develop a new tool, couple of test fixtures – Perform all tests at full and high speeds

May 16, Comparison of USB 1.1 / 2.0 w Tighter timings constraints due to higher (40 x) frequency w Dual speed support - Transaction Translator w Defined characteristics of both the transmitter and receiver w New test modes w Same cables

May 16, Similarities & Differences w Power requirements w USBCheck w Interoperability w Almost All Test Fixtures w Electricals – High Speed Signal Quality w Platform Testing w TDR Testing w More Extensive Hub Testing – Transaction Translator Similarities Differences

May 16, Similarities w Power Measurements w USBCheck w Interoperability w Almost All Test Fixtures

May 16, Power Measurements 500  a - Most devices 2.5 ma - High powered (> 100 ma) - Remote wakeup enabled) - Remote wakeup enabled) 100 ma - High powered (>100 ma) - Remote wakeup enabled - Remote wakeup enabled - WOL enabled - WOL enabledSuspended 500 ma Operating Configured 100 ma Unconfigured

May 16, Compliance Tool USBCheck w Small extensions to Chapter 9 & Chapter 11 – Chapter 9: new descriptors u 2 new Get Descriptor tests u Different endpoint constraints – Chapter 11: new status bits & test mode u 4 new port tests: Set/Clear Port Feature, PORT_TEST/PORT_INDICATOR w Core functionality is already there – Chap 9: No new requests, only function/type extensions – Chap 11: Same events must be handled u Connects, disconnects, reset, suspend, etc. w Test at both high and full speeds

May 16, Get Device Qualifier Screenshot Compliance Tool USBCheck

May 16, Interoperability Testing w Co-existence with USB 1.1 devices w Virtually same – All transfer types – 5 hubs deep with 5 meter cables (i.e. Tier 6) – Mix of speeds w Test devices at both Full and High Speeds Root HS Hub DUT HS Hub Other Devices Other Devices FS Hub HS Hub

May 16, Similarities – Test Fixtures w Current w Inrush w Drop w Droop w Full/Low Speed Signal Quality

May 16, Differences w Electricals – Signal Quality w Time Domain Reflectometer (TDR) w Platform Testing w More Extensive Hub Testing – Transaction Translator

May 16, Differences in Electricals w 480 MHz = 40x Frequency – Smaller margin for error! w Have the process and tools defined early – Oscilloscope characteristics – Tools to acquire data from scope to create eye patterns – Test modes u Used to measure, capture eye pattern u Device independent way to test devices

May 16, Signal Quality w USB 2.0 spec defines required eye pattern at internal/external connectors – 6 Patterns - Templates u 4 correspond to external connectors (TP2 & TP3) u 2 correspond to internal connectors (TP1 & TP4) – Rise / Fall Times – Allowance for jitter – Overshoot / undershoot w Testing will be at external connectors – New test fixture for high speed signal quality

May 16, Test Points w Transmitter w Receiver (New) USB Cable Device Circuit Board Hub / Motherboard BConnectorAConnector TracesTraces Transceiver TransceiverTP4TP3TP2TP1

May 16, Eye Patterns Template 0 Volts Differential + 400mV Differential - 400mV Differential Unit Interval Level 1 Level 2 Point 1 Point 2 Point 3Point 4 Point 5Point 6 0%100%

May 16, Templates Receiver sensitivity requirements for device without a captive cable with signal applied at TP3 and hub when a signal is applied at TP2 4 Receiver sensitivity requirements for device with captive cable with signal applied at TP2 3 Transmit waveform requirements for a device with a captive cable measured at TP2 2 Transmit waveform requirements for hub measured at TP2 and device measured at TP3 1 MeaningTemplate

May 16, Test Point Values * First Value in UI Following a Transition, Second Value Applies to All Others Template 1 Template 2 Template 3 Template 4 VoltageTimeVoltageTimeVoltageTimeVoltageTime Level mV / 425 mV * N/A 525 mV / 425 mV * N/A 575 mV N/A N/A Level mV / -425 mV * N/A -525 mV / -425 mV * N/A -575 mV N/A N/A TP1 0 V 7.5% 12.5% 10% 15% TP2 92.5% 0 0V 87.5% 0 V 90% 85% TP3 300 mV 37.5% 175 mV 35% 275 mV 40% 150 mV 35% TP4 300 mV 62.5% 175 mV 65% 275 mV 60% 150 mV 65% TP mV 37.5% -175 mV 35% -275 mV 40% -150 mV 35% TP mV 62.5% -175 mV 65% -275 mV 60% -150 mV 65%

May 16, Sample Eye Pattern (TP2)

May 16, Time Domain Reflectometer w Acronym: TDR w Means of measuring a receiver’s impedance – Receiver idle: D+, D- both at 0 volts w Requires new test fixture w To be run on ALL devices, hubs, and hosts

May 16, Platform Testing w Eye Pattern Testing at TP2 – Template 1 (Transmit) – Template 4 (Receive) w TDR Testing Motherboard A Connector Transceiver TP2 TP1 PC Platform Traces

May 16, Extensive Hub Testing w Signal Quality – Eye Patterns – At TP3 (downstream) in addition to TP2 (upstream) – Both transmitting (Template 1) and receiving (Template 4) w Hub specific commands – Port test modes w TDR Testing – All connectors (upstream B, downstream A) w Transaction Translator

May 16, Transaction Translator w What is a Transaction Translator? – Component of the hub that handles data transfers to/from full and low speed downstream devices w When is it used? – Active when hub is configured at high speed and full and/or low speed devices connected downstream u Buffers data transfers u Finite space u 2 kind of buffers u 1 TT per hub OR 1 TT per port

May 16, Transaction Translator Hub Components HS Device Device LSDevice Port MHz 12 MHz 1.5 MHz Port 2 Port N FSDevice HubRepeaterHubRepeater Routing Logic HubControllerHubController Hub State Machines Machines High speed connection TT 1 TT 2 TT N

May 16, Transaction Translator w How will we test – Devices & hubs of mixed speeds below hub – Set of rigorous tests to test TT using low/full speed device u Perform loopback u Both periodic & non-periodic transfers (actually all transfer types) u Check for isochrony hiccups, data integrity, etc.

May 16, Transaction Translator w TT Internals – Separate buffers for start/complete split (periodic) transfers – Data sent “just in time” to minimize buffer space – Minimum 2 buffers for non-periodic transfers Start-split FIFO Complete-split FIFO StartHandlerStartHandlerCompleteHandlerCompleteHandler Full/LowHandlerFull/LowHandler TT Microframe Pipeline for Periodic Split Transactions

May 16, Oscilloscope Requirements w List of scope / probe capabilities necessary – 5 G Samples/sec – 2 GHz bandwidth w List of scopes / probes with these capabilities – Scope: TDS 694C – 10 GS/s, 3 GHz – Probe: P6217 Fet probe – 4 GHz, 0.4 pf typ – More scopes and probes to be added

May 16, Conclusion w Two significant additions for USB2.0 Compliance – Electrical Testing – Transaction Translator Testing w Rest of stuff is the same with only slight modifications w Start the with the bar already high!

May 16,