System On Chip - SoC Mohanad Shini JTAG course 2005.

Slides:



Advertisements
Similar presentations
Hao wang and Jyh-Charn (Steve) Liu
Advertisements

SOC Design: From System to Transistor
Overview Why VLSI? Moore’s Law. The VLSI design process.
Apr. 20, 2001VLSI Test: Bushnell-Agrawal/Lecture 311 Lecture 31 System Test n Definition n Functional test n Diagnostic test  Fault dictionary  Diagnostic.
Embedded System Lab. What is an embedded systems? An embedded system is a computer system designed for specific control functions within a larger system,
A reconfigurable system featuring dynamically extensible embedded microprocessor, FPGA, and customizable I/O Borgatti, M. Lertora, F. Foret, B. Cali, L.
CHALLENGES IN EMBEDDED MEMORY DESIGN AND TEST History and Trends In Embedded System Memory.
Graduate Computer Architecture I Lecture 15: Intro to Reconfigurable Devices.
Extensible Processors. 2 ASIP Gain performance by:  Specialized hardware for the whole application (ASIC). −  Almost no flexibility. −High cost.  Use.
MICROELETTRONICA Design methodologies Lection 8. Design methodologies (general) Three domains –Behavior –Structural –physic Three levels inside –Architectural.
SOC Design at BWRC: A Case Study EE249 Discussion November 30, 1999 Mike Sheets.
1 HW/SW Partitioning Embedded Systems Design. 2 Hardware/Software Codesign “Exploration of the system design space formed by combinations of hardware.
IP Re-Use: The Key Challenge in SOC (System- on-Chip) Product Development D Y Yang Chairman, Taiwan SoC Consortium Jan. 14, 2003.
Spring 08, Jan 15 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2007 Introduction Vishwani D. Agrawal James J. Danaher.
Spring 07, Jan 16 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2007 Introduction Vishwani D. Agrawal James J. Danaher.
6/30/2015HY220: Ιάκωβος Μαυροειδής1 Moore’s Law Gordon Moore (co-founder of Intel) predicted in 1965 that the transistor density of semiconductor chips.
From Concept to Silicon How an idea becomes a part of a new chip at ATI Richard Huddy ATI Research.
Hardware/Software Partitioning Witawas Srisa-an Embedded Systems Design and Implementation.
EE587 SoC Design & Test School of EECS Washington State University
What is an IP Core ?.
SOC Design Lecture 4 Bus and AMBA Introduction.
System On Chip - SoC 전북대학교 전자공학부 이종열.
Role of Standards in TLM driven D&V Methodology
SOC Consortium Course Material ASIC Logic National Taiwan University Adopted from National Chiao-Tung University IP Core Design.
System On Chip - SoC 전북대학교 전자정보공학부 이종열. Outline Introduction What is SoC ? SoC characteristics Benefits and drawbacks Solution Major SoC Applications.
ON LINE TEST GENERATION AND ANALYSIS R. Šeinauskas Kaunas University of Technology LITHUANIA.
Core of the Embedded System
Principles Of Digital Design Chapter 1 Introduction Design Representation Levels of Abstraction Design Tasks and Design Processes CAD Tools.
CAD for Physical Design of VLSI Circuits
Lecture 17 Lecture 17: Platform-Based Design and IP ECE 412: Microcomputer Laboratory.
1 Integration Verification: Re-Create or Re-Use? Nick Gatherer Trident Digital Systems.
May 17, USB Semiconductor IP How to Integrate USB into Your Design Eric Huang inSilicon Corporation.
VLSI & ECAD LAB Introduction.
집적회로 Spring 2007 Prof. Sang Sik AHN Signal Processing LAB.
CMP 4202: VLSI System Design Lecturer: Geofrey Bakkabulindi
CSE 494: Electronic Design Automation Lecture 2 VLSI Design, Physical Design Automation, Design Styles.
J. Christiansen, CERN - EP/MIC
Chonnam national university VLSI Lab 8.4 Block Integration for Hard Macros The process of integrating the subblocks into the macro.
1 System-on-Chip (SoC) Testing An Introduction and Overview of IEEE 1500 Standard Testability Method for Embedded Core-based ICs.
Introduction to FPGA Created & Presented By Ali Masoudi For Advanced Digital Communication Lab (ADC-Lab) At Isfahan University Of technology (IUT) Department.
Business Trends and Design Methodologies for IP Reuse Allen C.-H. Wu Department of Computer Science Tsing Hua University Hsinchu, Taiwan, R.O.C {
EE 466/586 VLSI Design Partha Pande School of EECS Washington State University
EE3A1 Computer Hardware and Digital Design
Present – Past -- Future
DEVICES AND DESIGN : ASIC. DEFINITION Any IC other than a general purpose IC which contains the functionality of thousands of gates is usually called.
SOC Virtual Prototyping: An Approach towards fast System- On-Chip Solution Date – 09 th April 2012 Mamta CHALANA Tech Leader ST Microelectronics Pvt. Ltd,
EE141 © Digital Integrated Circuits 2nd Introduction 1 Principle of CMOS VLSI Design Introduction Adapted from Digital Integrated, Copyright 2003 Prentice.
VLSI Design System-on-Chip Design
Introduction to VLSI Design Amit Kumar Mishra ECE Department IIT Guwahati.
ECE 3110: Introduction to Digital Systems Introduction (Contd.)
Aditya Dayal M. Tech, VLSI Design ITM University, Gwalior.
1 Reuse Methodology for System-On-Chip Designs 전남대학교 정보통신공학부 교수 김 영 철
EMT 351/4 DIGITAL IC DESIGN Week # 1 EDA & HDL.
Programmable Logic Devices
ASIC Design Methodology
Programmable Logic Device Architectures
ELEC 7770 Advanced VLSI Design Spring 2016 Introduction
Difference Between SOC (System on Chip) and Single Board Computer
THE PROCESS OF EMBEDDED SYSTEM DEVELOPMENT
System On Chip - SoC E.Anjali.
Architecture & Organization 1
Introduction to Microprocessors
Chapter 1: The 8051 Microcontrollers
ELEC 7770 Advanced VLSI Design Spring 2014 Introduction
Architecture & Organization 1
ITRS Roadmap Design Process Open Discussion EDP 2001
ELEC 7770 Advanced VLSI Design Spring 2012 Introduction
ELEC 7770 Advanced VLSI Design Spring 2010 Introduction
HIGH LEVEL SYNTHESIS.
Unit -4 Introduction to Embedded Systems Tuesday.
Presentation transcript:

System On Chip - SoC Mohanad Shini JTAG course 2005

Agenda Introduction. What is SoC ? SoC characteristics. Benefits and drawbacks. Solution. Major SoC Applications. Summary.

Introduction Technological Advances –today’s chip can contains 100M transistors. –transistor gate lengths are now in term of nano meters. –approximately every 18 months the number of transistors on a chip doubles – Moore’s law. The Consequences –components connected on a Printed Circuit Board can now be integrated onto single chip. –hence the development of System-On-Chip design.

Agenda Introduction. What is SoC ? SoC characteristics. Benefits and drawbacks. Solution. Major SoC Applications. Summary.

What is SoC ? People A: The VLSI manufacturing technology advances has made possible to put millions of transistors on a single die. It enables designers to put systems- on-a-chip that move everything from the board onto the chip eventually. People B: SoC is a high performance microprocessor, since we can program and give instruction to the uP to do whatever you want to do. People C: SoC is the efforts to integrate heterogeneous or different types of silicon IPs on to the same chip, like memory, uP, random logics, and analog circuitry. All of the above are partially right, but not very accurate!!!

What is SoC ? SoC not only chip, but more on “system”. SoC = Chip + Software + Integration The SoC chip includes: Embedded processor ASIC Logics and analog circuitry Embedded memory The SoC Software includes: OS, compiler, simulator, firmware, driver, protocol stackIntegrated development environment (debugger, linker, ICE)Application interface (C/C++, assembly) The SoC Integration includes : The whole system solution Manufacture consultant Technical Supporting

Agenda Introduction. What is SoC ? SoC characteristics. Benefits and drawbacks. Solution. Major SoC Applications. Summary.

System on Chip architecture Top Level Design Unit Block Design Integration and Synthesis Trial Netlists System Level Verification Timing Convergence & Verification Fabrication DVT DVT Prep ??5 8 Time in Weeks Time to Mask order Unit Block Verification ASIC Typical Design Steps Typical ASIC design can take up to two years to complete

System on Chip architecture Top Level Design Unit Block Design Integration and Synthesis Trial Netlists System Level Verification Timing Convergence & Verification Fabrication DVT DVT Prep Time in Weeks Time to Mask order Unit Block Verification 4 2 With increasing Complexity of IC’s and decreasing Geometry, IC Vendor steps of Placement, Layout and Fabrication are unlikely to be greatly reduced In fact there is a greater risk that Timing Convergence steps will involve more iteration. Need to reduce time before Vendor Steps. Need to consider Layout issues up- front. SoC Typical Design Steps

System on Chip interconnection Design reuse is facilitated if “standard” internal connection buses are used. All cores connect to the bus via a standard interface. Any-to-any connections easy but … –Not all connections are necessary. –Global clocking scheme. –Power consumption. Standardization is being addressed by the Virtual Socket Interface Alliance (VSIA)

System on Chip interconnection AMBA (Advanced Microcontroller Bus Architecture) is a collection of buses from ARM for satisfying a range of different criteria. APB (Advanced Peripheral Bus): simple strobed- access bus with minimal interface complexity. Suitable for hosting peripherals. ASB (Advanced System Bus): a multimaster synchronous system bus. AHB (Advanced High Performance Bus): a high- throughput synchronous system backbone. Burst transfers and split transactions.

System on Chip cores One solution to the design productivity gap is to make ASIC designs more standardized by reusing segments of previously manufactured chips. These segments are known as “blocks”, “macros”, “cores” or “cells”. The blocks can either be developed in-house or licensed from an IP company. Cores are the basic building blocks.

System on Chip cores Soft Macro –Reusable synthesizable RTL or netlist of generic library elements –User of the core is responsible for the implementation and layout Firm Macro –Structurally and topologically optimized for performance and area through floor planning and placement –Exist as synthesized code or as a netlist of generic library elements Hard Macro –Reusable blocks optimized for performance, power, size and mapped to a specific process technology –Exist as fully placed and routed netlist and as a fixed layout such as in GDSII format.

System on Chip cores Reusability portability flexibility Predictability, performance, time to market Soft core Firm core Hard core

System on Chip cores Locating the required cores and associated contract discussions can be a lengthy process –Identification of IP vendors –Evaluation criteria –Comparative evaluation exercise –Choice of core –Contract negotiations Reuse restrictions Costs: license, royalty, tool costs –Core integration, simulation and verification

Agenda Introduction. What is SoC ? SoC characteristics. Benefits and drawbacks. Solution. Major SoC Applications. Summary.

The Benefits There are several benefits in integrating a large digital system into a single integrated circuit. These include –Lower cost per gate. –Lower power consumption. –Faster circuit operation. –More reliable implementation. –Smaller physical size. –Greater design security.

The Drawbacks The principle drawbacks of SoC design are associated with the design pressures imposed on today’s engineers, such as : –Time-to-market demands. –Exponential fabrication cost. –Increased system complexity. –Increased verification requirements.

Design gap

Agenda Introduction. What is SoC ? SoC characteristics. Benefits and drawbacks. Solution. Major SoC Applications. Summary.

Solution is Design Re-use Overcome complexity and verification issues by designing Intellectual Property (IP) to be re-usable. Done on such a scale that a new industry has been developed. Design activity is split into two groups: –IP Authors – producers. –IP Integrators – consumers. IP Authors produce fully verified IP libraries –Thus making overall verification task more manageable IP Integrators select, evaluate, integrate IP from multiple vendors –IP integrated onto Integration Platform designed with specific application in mind

Agenda Introduction. What is SoC ? SoC characteristics. Benefits and drawbacks. Solution. Major SoC Applications. Summary.

Major SoC Applications Speech Signal Processing. Image and Video Signal Processing. Information Technologies –PC interface (USB, PCI,PCI-Express, IDE,..etc) Computer peripheries (printer control, LCD monitor controller, DVD controller,.etc). Data Communication –Wireline Communication: 10/100 Based-T, xDSL, Gigabit Ethernet,.. Etc –Wireless communication: BlueTooth, WLAN, 2G/3G/4G, WiMax, UWB, …,etc

Agenda Introduction. What is SoC ? SoC characteristics. Benefits and drawbacks. Solution. Major SoC Applications. Summary.

Summary Technological advances mean that complete systems can now be implemented on a single chip. The benefits that this brings are significant in terms of speed, area and power. The drawbacks are that these systems are extremely complex requiring amounts of verification. The solution is to design and verify re-useable IP.