Nanomagnetic structures for digital logic Russell Cowburn Durham University Physics Department, UK www.durham.ac.uk/nano.magnetics.

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Presentation transcript:

Nanomagnetic structures for digital logic Russell Cowburn Durham University Physics Department, UK

Themes in spintronics Electron current Type 1: Information carried by spin polarised electrons in non- magnetic medium. Processed by ferromagnetic material. Type 2: Information carried by ferromagnetic material. Probed by electronic current.

Information transport by nanomagnets... H CK Input pin Number of dots per chain= 70 Dot diameter= 110nm Dot pitch= 135nm Dot thickness= 10nm ROOM TEMPERATURE Cowburn et al. Science 287, 1466 (2000) AND-gate

Clock Input=‘0’ Input=‘1’... Information transport by nanomagnets

Device operation Input=1 Input=0

Operating margin H f(H) Soliton propagation Soliton nucleation operating region IDEAL DEVICE H f(H) REAL DEVICE

Domain wall injection Kerr signal (  V) 100nm 200 Oe

Domain wall injection (2) 100nm Kerr signal (  V) 40 Oe Cowburn et al. J.Appl. Phys 91, 6949 (2002)

Domain wall pipleline at a corner? Field (Oe) Magnetisation -240 Oe 140 Oe

Memory effect and logic

Interconnect architecture H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

Golden rule “Signals can only propagate around corners of the same chirality as the field rotation.” – Cowburn’s Law © 2002 Possible to distinguish inputs from outputs; Well defined signal routing; Reversible system if you want it.

NOT gate H

Working NOT gate

NOT gate operation

Electronic analogue

Reversible operation Time (sec) I II Time (sec) I II H H

3-stage shift register

11-stage shift register Science 296, 2003 (2002)

Domain wall velocity Current pulse H pulse

Cross-over In 1 Out 1 In 2 Out 2

Domain wall cloning (fan-out) In Out 1 Out 2

Reasons to love nanomagnetic logic All-metallic  good scaling to the nanometre scale All on a single plane  very cheap to manufacture Any substrate  flexible, plastic electronics Devices have gain, full logic family available Energy per operation optimal (40 – 2000 k B T) 10 6 times lower speed-power product than CMOS Reasonably high density A complete architecture for nanoelectronics

Reasons to hate nanomagnetic logic  Poor prospects for very high speed (< 1GHz)  Difficult to apply magnetic field efficiently  No topological invariance of circuits  Edge roughness needs to be controlled

Conclusion We can emulate behaviour previously found only in semiconductor devices using all-metallic ferromagnetic materials. This offers a new paradigm for logic circuits in the future. Industrially viable to make low-cost, low-performance chips

Acknowledgements Durham University Physics Department: Dr Michael CookeColm Faulkner Dr Dan AllwoodPaul Brierly Dr Xiong GangMark Hibbert Dr Del AtkinsonKevin McGee Dr Nicolas Vernier Cambridge University Engineering Department: Prof. Mark Welland Eastgate Investment Ltd