Waiving Known DRC Violations from Layout IP John Ferguson Technical Marketing Engineer Mentor Graphics Corp.

Additional Metal DRC Rules The Problem Due to Process Limitations the Number of DRC Rules is Growing Rule Complexity is Also Growing Difficulty in Defining Rules to Capture Failure Configuration Leads to Over Constrainment Many ‘Errors’ Can Actually Yield Well Meeting all Design Rules is Difficult if Not Impossible 350nm 250nm 180nm 130nm 90nm 65nm 45nm Additional Metal DRC Rules 3 Layer Metal DRC Rules AE Training – mbDRC – Advanced Checks are simple

Manifestation: DRC “Waivers” Waivers = Real DRC Violations That are Allowed in a Design Layout for Mask and Chip Manufacturing Examples: Historic IP Block Has Been Manufactured Clean for Years. Now with New DRC Rules, It Fails. Certain Blocks (Memories) Take Advantage of Rigid Design Approach. Fail Standard Logic Rules, But Will Manufacture at a Reasonable Yield. Block is DRC Clean, but Has “Recommended Rule Violations” that Cannot be Fixed Without Generating DRC Violations AE Training – mbDRC – Advanced Checks are simple

Traditional IP Waivers Dilemma IP Provider (e.g. ARM, Virage, etc.) Foundry (e.g. TSMC, UMC, etc.) Can I waive these? Sure, why not. Runs DRC Gets Results Phones Foundry Delivers IP to Customer What is with this IP you sold me!!. What do you mean? Foundry said I could waive! Can I waive these? Let’s call him together and waste tons of your time sorting thi out! What?!? Heck No!! Designer: Integrates IP into Design Gets Results Manually Reviews All Why so many in IP?? Phones Foundry Phones IP Provider Fabless (e.g. Broadcom, Qualcomm, etc.) AE Training – mbDRC – Advanced Checks are simple

Historic Approaches to Try to Solve the Problem Black-Box the IP During DRC Fast RunTimes False Results Eliminated Missed Real Errors Remove Results Per Block Per Cell At DRC Runtime or Post-Process No Missed Real Errors Many False Errors Still Exist AE Training – mbDRC – Advanced Checks are simple

Issue: Interaction Errors Between Waived Cells Can be Incorrectly Waived Identify Blue Inside Waived Cell Waive Spacing Errors Between Identified Shapes Waived Cell Waived Result Errors from Interactions Also Waived X = M1 NOT INSIDE CELL A Y = M1 INSIDE CELL A Check {EXTERNAL X < .2 EXTERNAL X Y < .2} AE Training – mbDRC – Advanced Checks are simple

Results Not Consistent with All Instances: Result Promotion Results Not Consistent with All Instances: Reported at Top Unique Errors Reported at Top Waived Cell Waived Result Results No Longer Associated with Waived Cell Waivers Do Not Apply AE Training – mbDRC – Advanced Checks are simple

Proposed DRC Waiver Flow The Waiver Flow is a 2-Step Process Waiver classification: Identify Waived Results within Cells Cell Library Cell Library W/ Waivers Waiver_flow Cell Characterization Rules Chip level run: Merge chip database with waived results Distinguish waived results by waiver requirements during DRC Remaining results output Also capture all waived results for record keeping Waiver Setup File Chip GDSII Chip Verification Results Final Results Waived Results Unused waivers AE Training – mbDRC – Advanced Checks are simple

Solving the IP Waiver Dilemma IP Provider (e.g. ARM, Virage, etc.) Foundry (e.g. TSMC, UMC, etc.) Can I waive these? Runs DRC Gets Results Phones Foundry Delivers IP to Customer Sure, why not. Designer: Integrates IP into Design Gets Results Waived Results Removed! Goes Home Early for the Day! Fabless (e.g. Broadcom, Qualcomm, etc.) AE Training – mbDRC – Advanced Checks are simple

Typical Flows Representing 3rd Party Foundry & IP Provider 3rd Party IP with Waivers Embedded into Design IP Block Containing Errors to Waive Rules from Foundry Other Files Created by IP Provider Foundry Golden Rules Waiver Setup File Waiver Description File waiver_flow Cell Characterization DRC Chip Verification Waivers Merged with IP By IP Provider Waivers Stripped from Final Results Using Info from Waiver Files IP with Waivers and Waiver Files Passed to Customer By IP Provider Purchased / Reused IP AE Training – mbDRC – Advanced Checks are simple

Proposed Waiver Flow DRC DRC Debug Debug The Proposed Waiver Flow Provides a Automated Communication Channel Between Foundry, IP Providers and Designers for Significantly Reducing Design Debug Time by Eliminating the Reporting of Known and Waived Errors from IP Blocks Unlike Historic Approaches, The Waiver Flow Requires Little Effort by the Designer and Minimizes the Risk of Missed Real Errors without Increasing the Reporting of False Errors AE Training – mbDRC – Advanced Checks are simple

Waiver_Flow: Capturing the Waivers at the IP Level

waiver_flow: Capturing the Cell Results to Waive A ALL B foo C bar ./Waiver_results/A/DRC_RES.db All Rule Results Waiver.gds Waived Results Only rules waiver_flow waiver_setup ./Waiver_results/B/ DRC_RES.db All Rule Results ./Waiver_results/C/ DRC_RES.dbAll Rule Results Chip or Cell Lib C A B -hier and -64 needed to keep consistency of results. All rules must be run to keep consistency of results. Also allows editing of individual results. Ascii Result May be Edited to Selected Results Only Optionally Create New Library with Original Lib and Waivers Merged AE Training – mbDRC – Advanced Checks are simple

Minimizing Reserved Layers Creates Empty Cell for Each Waived Cell Name Instantiates Child Cell into Waived Cell <waiver_keyword>_<check_name>_< orig cell name> Once Cell For Each Waived Check All Results on Specified Layer from waiver_setup Subsequent DRC Differentiates Results by Cell Name Only One Reserved Layer Required! Output Library GDS Files Merges Waiver.gds with Original Cell Data Waiver Cells Instantiated Added Cell Naming Convention Remains Intact Cell Nand2_2x Cell = waive$$_PO.W.R.2_in_Nand2_2x Cell = waive$$_PO.W.S.5_in_Nand2_2x AE Training – mbDRC – Advanced Checks are simple

Waiving from Chip Level

Removal of Waivers The Removal of Waived Results from Real Results is Done at the Time of Running DRC Determined by Pattern Matching Previously Captured IP Waivers to Chip Level Results for the Same Rule DRC Hierarchical Engine Resolves Issues of Results Promotion The Pattern Matching is Determined through the Setup File As Qualified Per Check by the Foundry or Fab AE Training – mbDRC – Advanced Checks are simple

Pattern Matching Criteria: Handling Multiple Overlaps Original IP Should Final Result be Waived? Generated Waivers Parent Level Results (pre-waived) Context IP Block Waiver Setup Specifies Handling of Multiple Overlaps AE Training – mbDRC – Advanced Checks are simple

Tolerances for Waiver Overlap? Chip IP Block IP Waiver Should the Green Results Still Be Waived? Waiver Setup Specifies Required IP Waiver to Chip Error Pattern Matching AE Training – mbDRC – Advanced Checks are simple

Allowing Tolerances for Waiving Chip IP Block Chip level result IP Waiver Allowable Difference? Waiver Setup Specifies Chip Error to IP Waiver Pattern Matching Criteria A Result is Either Fully Waived or Not Waived No chopping of results AE Training – mbDRC – Advanced Checks are simple

Example 1 inv_1 inv_1 in Layout Full-chip result m1_space_waiver A single waiver interacts with the result The waiver matches the result exactly The result matches the waiver exactly AE Training – mbDRC – Advanced Checks are simple

Example 2 Waiving Will Depend On the Specification of the Waiver to Result Matching inv_1 inv_1 in Layout Full-chip result m1_space_waiver A single waiver interacts with the result The waiver is not fully covered by the result The result is fully covered by the waiver AE Training – mbDRC – Advanced Checks are simple

Example 3 Waiving Will Depend On the Specification of the Result to Waiver Matching inv_1 inv_1 in Layout Full-chip result m1_space_waiver AE Training – mbDRC – Advanced Checks are simple

Example 4 Waiving Will Depend On the Specification of the Waiver to Result Matching AND Count Tolerance inv_1 inv_1 in Layout m1_space_waiver AE Training – mbDRC – Advanced Checks are simple

Summary The Proposed Waiver Flow Provides Significant Value Over Historic Automated Approaches to Waiving DRC Violations All Waived Results Automatically and Accurately Waived at DRC Run Time Enables Passing of IP Between 3rd Parties with Waiver Information in Tact Enables Foundry to Specify Acceptable Waiving Tolerances Per Rule Per IP Eliminates Need for Rule File Modifications Works from Standard GDSII, No Proprietary Formats All Waived Results Captured for Final Review and Tracking AE Training – mbDRC – Advanced Checks are simple

AE Training – mbDRC – Advanced Checks are simple