May 9, 2001

High-Speed Detection Handshake Considerations May 9, 2001 High-Speed Detection Handshake Considerations Jerome Tjia Philips Semiconductors May 9, 2001

Why This Topic? Chirping process is the pre-requisite to high-speed operation (failure in chirping process defaults back to FS/LS mode) A few “gotchas” in the implementation If not properly designed, it will become a major interoperability issue May 9, 2001

Reset/Speed Detection Protocol High-speed capable devices are reset by 10ms of continuous SE0 (same as USB 1.1) During Reset, a high-speed capable device “chirps” to the hub If a USB 2.0 hub detects this chirp, it completes the handshake by chirping back to the device within the Reset If the handshake is completed during Reset, both hub and device come out of Reset in high-speed mode May 9, 2001

Reset Handshake Signaling Device chirp is a Chirp K (detected with hub’s high-speed receiver) Device chirps by driving current in D- line while leaving D+ pullup in place and leaving terminations inactive Hub chirp is a series of alternating Chirp J’s and K’s Hub chirps by driving current into D+ or D- line Reference state machines included in Appendix C May 9, 2001

Device detects Hub Chirp May 9, 2001 Timeline for Reset μSOF Device Chirp Hub Chirp D+ D– 3.0-3.125 ms 100-875 μs < 500 μs > 1.0 ms < 7.0 ms < 100 μs 100-500 μs > 10 ms End of Device Chirp Start of Device Chirp Start of Reset Device reverts to FS Device reverts to HS Device detects Hub Chirp End of Reset End of Hub Chirp Start of Hub Chirp Hub Device SE0 HS idle Now let’s look at some further detail to the signaling that is taking place during the reset protocol. First a small explanation on the above timeline diagram. Shown are the signals on the D+ and D- lines, both the voltage (vertical) and the time (horizontal) axes are not to scale. The dashed blue lines show the USB 1.1 signaling levels; the small bursts at the start and end of the signal traces are regular HS packets. At the top, we see the time references and duration that are related to the hub, at the bottom the same applies, but now for the device. After start of reset which is initiated by the hub, the device waits for 3 to 3.125 ms before reverting to full-speed configuration (HS termination switched off, the D+ pull-up resistor in place) and samples the line state after again 100 to 875 μs. If the line is in SE0 state, the device sends out its so called Device Chirp, a K with about double the amplitude of a HS K. This device chirp takes at least 1 ms, but should end before we are 7.0 ms from the start of reset. After the end of reset, the lines return to HS idle state; as soon as the hub detects this and it has successfully detected the Device Chirp, it will start to transmit the so called Hub Chirp. This is a sequence of K’s and J’s, also of double amplitude, with each a duration between 40 and 60 μs. The device will have to detect a sequence of at least KJKJKJ to have successfully detected the Hub chirp. After that , it may wait at most 500 μs before reverting to HS default state. The continuing Hub Chirp will prevent the device from going into suspend. After the Hub Chirp, the hub waits between 100 and 500 μs before starting the regular communications at high-speed. May 9, 2001

A Closer Look at SE0 Level During Reset During reset, SE0 level are not exactly at ground 1.5 k ohm pull-up resistor on D+ is not disconnected yet Results in a little offset voltage May 9, 2001

USB 2.0 Transceiver Functionality Legacy Driver Disconnection Envelope Detector Single Ended Receivers Legacy Data Receiver LS/FS_Data_Driver_Input Assert_Single_Ended_Zero HS_Differential_Receiver_Output SE_Data+_Receiver_Output SE_Data-_Receiver_Output Rpu_Enable HS_Drive_Enable HS_Data_Driver_Input FS_Edge_Mode_Sel LS/FS_Driver_Output_Enable HS_Current_Source_Enable Differential_Receiver_Enabled HS_Disconnect_Detected Legacy_Differential_Receiver_Output Rs High Speed Current Driver Transmission Envelope Detector HS Differential Data Receiver +3.3V Data+ Data- Rpu May 9, 2001

DC Condition During Reset Z HSDRV (45 ohm +/- 10%) R PD (15k +/- 5%) D+ D- PU (1k5 +/- 5%) V TERM (3.3 +/- 0.3 V) Host/Hub Device DC condition during reset ON OFF May 9, 2001

DC Voltage Levels During Reset DC Voltage at D+/D- lines: VD- = 0V VD+ = VTERM * (ZHSDRV // RPD) / ((ZHSDRV // RPD) + RPU) VD+ (min, typ, max) voltage = (79, 96, 120) mV VTERM = 3.3 +/- 0.3V ZHSDRV = 45 ohm +/- 10% RPU = 1k5 +/- 5% RPD = 15k +/- 5% This offset voltage is termed “Tiny-J” May 9, 2001

Will Tiny-j Become Valid J? Two conditions to become valid-J: Differential receiver able to indicate J data Squelch threshold must be crossed to indicate valid data Differential receiver is normally very sensitive Though spec is 150 mV (differential) A tiny-J of 96 mV typical voltage level will most likely be detected as a ‘J’ Squelch threshold may potentially be crossed too Very likely that tiny-J be interpreted as a valid J May 9, 2001

Overlapping Squelch Threshold and Tiny-J levels 150 mV 120 mV 100 mV 79 mV May 9, 2001

High-Speed Detection Handshake FS Idle FS SE0 Chirp K Alternating Chirp K & J HS Idle 96 mV (120 mV wc) 3.0 V 800 mV 900 mV D+ D- Squelch: 100-150 mV differential "Tiny J" 0 mV Reset Protocol and High-speed Detection Handshake May 9, 2001

Warning #1: Hub/host Should Ignore Tiny-J During reset, hub/host is looking for a chirp-K Potentially, it can receive a valid chirp-J Hub/host should ignore this chirp-J It should not reject or decide that the attached device is not high-speed capable at this time It should continue to listen for a chirp-K for 7 ms or until the end of reset period May 9, 2001

Warning #2: End of Chirp-K Timing End of chirp-K is another tiny-J level! Cannot rely solely on squelch detector deassertion as the marker for end of chirp-K Use non zero data pattern to indicate end of chirp-K End of chirp-K -> alternating chirps K,J May 9, 2001

Warning #3: Transceiver Design Guideline Although tiny-J can be handled by upper digital logic layer of the host/hub, it’s double assurance to tackle it in the transceiver To ensure that tiny-J is not interpreted as a valid J ensure squelch threshold higher than tiny-J, by: Increasing (doubling) squelch threshold during chirping period (will this violate spec?) OR Designing squelch threshold voltage to be 120-150 mV (tough?, no noise margin) May 9, 2001

Overlapping Squelch Threshold and Tiny-J levels 150 mV 120 mV 100 mV 79 mV May 9, 2001

Other/minor Warnings - Device Device starts driving chirp-K upon detection of reset signaling Device Reset can happen from different states Reset from (FS) suspended state Reset from FS non-suspended state Reset from HS non-suspended state initially indistinguishable from suspend wait for 3 ms, switch to FS, wait TWTRSTHS (~ 500 us) debounce and settling time and then detects SE0 May 9, 2001

Device detects Hub Chirp May 9, 2001 Timeline for Reset μSOF Device Chirp Hub Chirp D+ D– 3.0-3.125 ms 100-875 μs < 500 μs > 1.0 ms < 7.0 ms < 100 μs 100-500 μs > 10 ms End of Device Chirp Start of Device Chirp Start of Reset Device reverts to FS Device reverts to HS Device detects Hub Chirp End of Reset End of Hub Chirp Start of Hub Chirp Hub Device SE0 HS idle Now let’s look at some further detail to the signaling that is taking place during the reset protocol. First a small explanation on the above timeline diagram. Shown are the signals on the D+ and D- lines, both the voltage (vertical) and the time (horizontal) axes are not to scale. The dashed blue lines show the USB 1.1 signaling levels; the small bursts at the start and end of the signal traces are regular HS packets. At the top, we see the time references and duration that are related to the hub, at the bottom the same applies, but now for the device. After start of reset which is initiated by the hub, the device waits for 3 to 3.125 ms before reverting to full-speed configuration (HS termination switched off, the D+ pull-up resistor in place) and samples the line state after again 100 to 875 μs. If the line is in SE0 state, the device sends out its so called Device Chirp, a K with about double the amplitude of a HS K. This device chirp takes at least 1 ms, but should end before we are 7.0 ms from the start of reset. After the end of reset, the lines return to HS idle state; as soon as the hub detects this and it has successfully detected the Device Chirp, it will start to transmit the so called Hub Chirp. This is a sequence of K’s and J’s, also of double amplitude, with each a duration between 40 and 60 μs. The device will have to detect a sequence of at least KJKJKJ to have successfully detected the Hub chirp. After that , it may wait at most 500 μs before reverting to HS default state. The continuing Hub Chirp will prevent the device from going into suspend. After the Hub Chirp, the hub waits between 100 and 500 μs before starting the regular communications at high-speed. May 9, 2001

Summary Specification is OK as is Tiny-J needs to be taken care of properly Watch out for warnings/gotchas in transceiver, host/hub and device design Will become a major interoperability issue if not properly designed May 9, 2001