Welcome1 “A next generation 0.1-Terabit encryption device that can be seamlessly embedded in network infrastructures to provide quantum enabled security.”

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Welcome1 “A next generation 0.1-Terabit encryption device that can be seamlessly embedded in network infrastructures to provide quantum enabled security.” QCRYPT Fast coherent-one way quantum key distribution and high-speed encryption Nino Walenta University of Geneva, GAP-Optique Zurich,

Outline2 QCRYPT Fast coherent-one way quantum key distribution and high-speed encryption 1.Introduction 2.The QKD engine 3.The hardware key distillation engine 4.The 100 Gbit/s encryption engine 5.Outlook

Interdisciplinary competences3 Nino Walenta, Charles Lim Ci Wen, Raphael Houlmann, Olivier Guinnard, Hugo Zbinden, Rob Thew, Nicolas Gisin Etienne Messerli, Pascal Junod, Gregory Trolliet, Fabien Vannel, Olivier Auberson, Yann Thoma Norbert Felber, Christoph Keller, Christoph Roth, Andy Burg Patrick Trinkler, Laurent Monat, Samuel Robyr, Lucas Beguin, Matthieu Legré, Grégoire Ribordy

QCrypt Specifications4  625 Mbit/s clocked QKD  1.25 GHz Rapid gated single photon detectors  Hardware key distillation  1 Mbit/s One-Time-Pad encryption  1-fibre DWDM configuration  Continuous and reliable operation  10 Ethernet channels at 10 Gbit/s  100 Gbit/s AES encryption engine  100 Gbit/s data channel over a single fiber  Tamper proof  Certification

Coherent One-Way quantum key distribution5 1.Preparation: Alice encodes information into two time-ordered coherent states 2.Measurement: 3.“Sifting”: 4.Post-processing: 5.Authentication:

Coherent One-Way quantum key distribution6 1.Preparation: Alice encodes information into two time-ordered coherent states 2.Measurement: Bob measures pulse arrival time (bit value) and coherence between bits (eavesdropper’s potential information about key). 3.“Sifting”: Bob tells Alice publicly, when and in which detector he measured (bit measurement or coherence measurement), incompatible measurements are discarded. 4.Post-processing: 5.Authentication:

Coherent One-Way quantum key distribution7 1.Preparation: Alice encodes information into two time-ordered coherent states 2.Measurement: Bob measures pulse arrival time (bit value) and coherence between bits (eavesdropper’s potential information about key). 3.“Sifting”: Bob tells Alice publicly, when and in which detector he measured (bit measurement or coherence measurement), incompatible measurements are discarded. 4.Post-processing: 5.Authentication: tBtB

Coherent One-Way quantum key distribution8 1.Preparation: Alice encodes information into two time-ordered coherent states 2.Measurement: Bob measures pulse arrival time (bit value) and coherence between bits (eavesdropper’s potential information about key). 3.“Sifting”: Bob tells Alice publicly, when and in which detector he measured (bit measurement or coherence measurement), incompatible measurements are discarded. 4.Post-processing: Eliminate quantum bit errors and reduce eavesdropper’s potential information about the key. 5.Authentication: QBER Visibility

Coherent One-Way quantum key distribution9 1.Preparation: Alice encodes information into two time-ordered coherent states 2.Measurement: Bob measures pulse arrival time (bit value) and coherence between bits (eavesdropper’s potential information about key). 3.“Sifting”: Bob tells Alice publicly, when and in which detector he measured (bit measurement or coherence measurement), incompatible measurements are discarded. 4.Post-processing: Eliminate quantum bit errors and reduce eavesdropper’s potential information about the key. 5.Authentication: Assure that public communication is authentic. Secret key costs!

Coherent One-Way quantum key distribution10 C. Ci Wen Lim, N. Walenta, H. Zbinden. A quantum key distribution protocol that is highly robust against unambiguous state discrimination attacks. Submission in process..  No decoy states  One-way sifting  One basis - no sifting losses  More robust against USD attacks  No active elements at Bob  Robust bit measurement basis  Robust against PNS  Security proof for zero error attacks and some collective attacks Advantages of modification H. Zbinden, N. Walenta, C. Ci Wen Lim. US-Patent Nr. 13/

Security against zero-error attacks11 C. Ci Wen Lim, N. Walenta, H. Zbinden. A new Coherent One-Way protocol that is highly immune against unambiguous state discrimination attacks. M. Mafu, A. Marais, F. Petruccione. Towards the security of coherent-one-way quantum key distribution protocol. Poster session 16: :00 Distance [km] Secret key fraction

DWDM Dense wavelength division multiplexing12 Multiplexing classical channels (> -28 dBm) along with quantum channel (< -71 dBm) on 100 GHz DWDM grid Channel crosstalk  „Off-band noise“ due to finite channel isolation of the multiplexers  Reduced below detector dark counts by MUX channel isolation (-82 dB) Raman scatter  Scattering off optical phonons, in forward and backward direction  Dominating for fibre lengths > 10 km

DWDM impairment sources13 Channel crosstalk  „Off-band noise“ due to finite channel isolation of the multiplexers  Reduced below detector dark counts by MUX channel isolation (-82 dB) Raman scatter  Scattering off optical phonons, in forward and backward direction  Dominating for fibre lengths > 10 km P. Eraerds, N. Walenta et al. Quantum key distribution and 1 Gbps data encryption over a single fibre. NJP 12, (2010).

QKD performance estimates14 2-fibre configuration 1-fibre DWDM configuration

Fast pulse pattern modulation ps  t fwhm 130 ps Pulse amplitude modulation  Off-the-shelf components  High extinction ratio  QBER IM < 0.2 %  High visibiliy  625 MHz Pulse pattern repetition frequency V > 0.995

Rapid gated single photon detectors ps

QKD performance estimates17 Rapid gated single photon detectors  Low dead time 8 ns  Low afterpulse probability< 1%  High detection rates > 33 MHz  Peltier cooled InGaAs diode  Compact design 100 km 50 km 0 km

Hardware key distillation engine18 SiftingBit permutationError estimationError correctionPrivacy amplificationError verification Authentication Random sampling for QBER LDPC forward error correction Toeplitz hashing CRC check Polynomial hashing Ommited Timing and base information Hardware limits on maximal key length MemoryThroughput Key size

Sifting channel19 D3D2D1 001Data detection 010IF detection at t 1 011IF detection at t 2 100Bit 0 for QBER estimation 101Bit 1 for QBER estimation 111Include next block Indicator bitsTiming bits, relative to last detection High detection rate Low detection rate

LDPC Information reconciliation20 Ensure integrity of secret keys with minimum redundancy through forward error correction and privacy amplification Theoretically capacity-approaching - practically ressource limited efficiency Reverse reconciliation FPGA implementation Syndrome of length Low-density parity-check codes C. Roth, P. Meinerzhagen, C. Studer, A. Burg. "A 15.8 pJ/bit/iter quasi-cyclic LDPC decoder for IEEE n in 90 nm CMOS," Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian, (2010)

Privacy amplification21 Toeplitz hashing Alice and Bob have to agree on a randomly selected Toeplitz matrix k + n sift -1 bits of communication Seed of length H. Krawczyk. LFSR-based hashing and authentication. Lecture Notes in Computer Science 839 (1994) C.Branciard et al. Upper bounds for the security of two distributed-phase reference protocols of quantum cryptography. NJP 10, (2008).

tag length Security parameter Information theoretic authentication22 D.R. Stinson. Universal hashing and authentication codes. Advances in Cryptology ‘91. Secret bits D.R. Stinson. Universal hashing and authentication codes. Designs, Codes and Cryptography, 4 (1994).

Information theoretic authentication23 Polynomial hashing  Construct an almost universal family of hash functions and apply a strongly universal hash function at the end. D.R. Stinson. Universal hashing and authentication codes. Designs, Codes and Cryptography, 4 (1994). tag length Security parameter Secret bits

100 Gbit/s Encryption engine24 FPGA design and 100 Gbps Interface  User side:10 x 10 Gbit/s Ethernet channels through 10 SPF+ optical modules  Client side:1 x 100 Gbit/s channel over a single fibre using WDM optical module feeds with 10 x 10 Gbit/s high-speed serial links  All synchronization and channels splitting made in the FPGA 10 x 10 Gbit/s Users interfaces1 x 100 Gbit/s Client interface

Cyphertext Plaintext Key Authentication tag Authenticated data and cyphertext 100 Gbit/s AES-GCM encryption25 Basic AES: 1 – 2 Gbit/s  20 x pipelining: requires feedback-free Encryption mode  4 x parallelization: data-independent partitioning  Counter mode Basic Authentication: 4 – 8 Gbit/s  4 x pipelining  4 x parallelization  4 Galois field multipliers (x 128 +x 7 +x 2 +x+1) Two engines for En- and Decryption

100 Gbit/s Fast encryption board Gbit/s Fast Encryption Board  PCB:24 layers, 52 high-speed serial links,10 power supplies  Communication links:22x High-speed serial 6.5 Gbit/s 8x SFP+; 2x XFP 10 Gbit/s 1x CXP; 1x CFP 100 Gbit/s  FPGA main power supply:0.95 V, 40 A

Outlook27 Real network compatibility and integration Side channel analysis Tamper detection Resistance against detector blinding attack Certification Afterpulsing reconcillation

Questions, please! 28 Thank you for your attention! Real network compatibility and integration Side channel analysis Tamper detection Resistance against detector blinding attack Certification Afterpulsing reconcillation