CHAPTER 4 I/O PORT PROGRAMMING. I/O Port Pins The four 8-bit I/O ports P0, P1, P2 and P3 each uses 8 pins All the ports upon RESET are configured as input,

Slides:



Advertisements
Similar presentations
4/10/2007ESD,USIT,GGSIPU1 I/O Port Programming Port 1 pins 1-8 Port 1 is denoted by P1. –P1.0 ~ P1.7 We use P1 as examples to show the operations on ports.
Advertisements

8086 [2] Ahad. Internal! External? 8086 vs _bit Data Bus 20_bit Address 8_bit Data Bus 20_bit Address Only external bus of 8088 is.
Parul Polytechnic Institute
Week10 Boolean Instructions on the Boolean Instructions  Boolean (or Bit) addressable capability is unique to the 8051  Enables efficient handling.
PROGRAMMABLE PERIPHERAL INTERFACE -8255
Suranaree University Of Technology มทส  2002 Anant Oonsivilai 2002/2/25 Microcomputers and Microprocessors 1 Chapter 4 I/O Port Programming.
EXTERNAL COMMUNICATIONS DESIGNING AN EXTERNAL 3 BYTE INTERFACE Mark Neil - Microprocessor Course 1 External Memory & I/O.
TK2633 Introduction to Parallel Data Interfacing DR MASRI AYOB.
Engineering 4862 Microprocessors Lecture 23 Cheng Li EN-4012
Embedded System Spring, 2011 Lecture 9: I/O Programming Eng. Wazen M. Shbair.
COMP3221: Microprocessors and Embedded Systems Lecture 17: Computer Buses and Parallel Input/Output (I) Lecturer: Hui.
The 8085 Microprocessor Architecture
Microprocessor and Microcontroller
I/O Unit.
DIRECT MEMORY ACCESS CS 147 Thursday July 5,2001 SEEMA RAI.
1 TK2633TK Microprocessor Architecture DR MASRI AYOB.
INTERRUPTS PROGRAMMING
MODES OF Details of Pins Pin 1 –Connected Ground Pins 2-16 –acts as both input/output. Outputs address at the first part of the cycle and outputs.
1 EKT 225 MICROCONTROLLER I CHAPTER 3 I/O PORT PROGRAMMING.
Khaled A. Al-Utaibi  Intel Peripheral Controller Chips  Basic Description of the 8255  Pin Configuration of the 8255  Block Diagram.
Embedded Systems Design 1 Lecture Set 6 I/O Ports.
Chapter 10: Input / Output Devices Dr Mohamed Menacer Taibah University
I/O Ports CS-280 Dr. Mark L. Hornick 1. CS-280 Dr. Mark L. Hornick 2 Ports are channels from the CPU to external hardware and software Atmega32 has: 4.
Parallel Ports, Power Supply and the Clock Oscillator Material to be covered  Parallel I/O ports  Interfacing external switches and LEDs  Clock Oscillator.
The 8051 Microcontroller and Embedded Systems
NS Training Hardware.
8086/8088 Hardware Specifications A Course in Microprocessor Electrical Engineering Dept. University of Indonesia.
By, Prof. Tambe S. S. S.N.D. College of Engineering and Research Center Department of Electrical Engineering.
MOBILE OPERATING ROBOT ON EMBEDDED SYSTEM
The 8051 Microcontroller and Embedded Systems
Basic Sequential Components CT101 – Computing Systems Organization.
CHAPTER HARDWARE CONNECTION. Pin Description 8051 family members ◦ e.g., 8751, 89C51, 89C52, DS89C4x0) ◦ Have 40 pins dedicated for various functions.
Input-Output Organization
IO Subsystem IV Ports and peripherals. IO Subsystem (1) All devices connected to the system buses, other than memory and CPU – Input and output ports.
12/16/  List the elements of 8255A Programmable Peripheral Interface (PPI)  Explain its various operating modes  Develop a simple program to.
Microcontroller Intel 8051 [I/O Ports]. Pin out of the 8051 –40 pin package –32 pins are used for the 4 ports. –V CC / V SS –ALE Address Latch Enable.
PPI-8255.
Programmable Interrupt Controller (PIC)
I/O AND THE 8255; ISA BUS INTERFACING
PROGRAMMABLE PERIPHERAL INTERFACE -8255
Introduction to Microprocessors - chapter3 1 Chapter 3 The 8085 Microprocessor Architecture.
Input/Output Problems Wide variety of peripherals —Delivering different amounts of data —At different speeds —In different formats All slower than CPU.
EE365 - Microprocessors period 26 10/23/00 D. R. Schertz # Parallel Ports.
Presented by Sadhish Prabhu
بسم الله الرحمن الرحيم MEMORY AND I/O.
8085 Microprocessor: Architecture & Support Components.
Multiplex of Data and Address Lines in 8088 Address lines A0-A7 and Data lines D0-D7 are multiplexed in These lines are labelled as AD0-AD7. –By.
Sequential Logic Design
8255: Programmable Peripheral Interface (PPI)
CHAPTER ADDRESSING MODES.
The 8085 Microprocessor Architecture
Introduction to the processor and its pin configuration
The 8085 Microprocessor Architecture
The 8255 Programmable Peripheral Interface
8085 microprocessor.
8085 Microprocessor Architecture
An Introduction to Microprocessor Architecture using intel 8085 as a classic processor
Why microcontrollers in embedded systems?
Interfacing Memory Interfacing.
Parallel communication interface 8255
8085 Microprocessor Architecture
Programmable Peripheral Interface
Important 8051 Features On chip oscillator 4K bytes ROM 128 bytes RAM
The 8085 Microprocessor Architecture
CHAPTER HARDWARE CONNECTION.
8085 Microprocessor Architecture
CHAPTER 4 I/O PORT PROGRAMMING.
The Programmable Peripheral Interface (8255A)
Presentation transcript:

CHAPTER 4 I/O PORT PROGRAMMING

I/O Port Pins The four 8-bit I/O ports P0, P1, P2 and P3 each uses 8 pins All the ports upon RESET are configured as input, ready to be used as input ports ◦ When the first 0 is written to a port, it becomes an output ◦ To reconfigure it as an input, a 1 must be sent to the port ◦ To use any of these ports as an input port, it must be programmed

Port 0 It can be used for input or output ◦ Each pin must be connected externally to a 10K ohm pull-up resistor  This is due to the fact that P0 is an open drain, unlike P1, P2, and P3  Open drain is a term used for MOS chips in the same way that open collector is used for TTL chips

Port 0 (cont.)

Port 0 as Input In order to make port 0 an input, the port must be programmed by writing 1 to all the bits

I/O Port Cell

Dual Role of Port 0 Port 0 is also designated as AD0-AD7 ◦ Allowing it to be used for both address and data ◦ When connecting an 8051/31 to an external memory, port 0 provides both address and data

Port 1 Port 1 can be used as input or output ◦ In contrast to port 0, this port does not need any pull-up resistors since it already has pull- up resistors internally ◦ Upon reset, port 1 is configured as an input port

Port 1 as Input To make port 1 an input port, it must be programmed as such by writing 1 to all its bits

Port 2 Port 2 can be used as input or output ◦ Just like port 1, port 2 does not need any pull- up resistors since it already has pull-up resistors internally ◦ Upon reset, port 2 is configured as an input port

Port 2 as Input or Dual Role To make port 2 an input port, it must be programmed as such by writing 1 to all its bits ◦ In many 8051-based system, P2 is used as simple I/O ◦ In 8031-based systems, port 2 must be used along with P0 to provide the 16-bit address for the external memory  Port 2 is also designated as A8 – A15  Port 0 provides the lower 8 bits via A0 – A7

Port 3 Port 3 can be used as input or output ◦ Port 3 does not need any pull-up resistors ◦ Port 3 is configured as an input port upon reset  This is not the way it is most commonly used Port 3 has the additional function of providing some extremely important signals

Port 3 (cont.)

Different ways of Accessing Entire 8 Bits

I/O Ports and Bit Addressability Sometimes we need to access only 1 or 2 bits of the port

I/O Ports and Bit Addressability (cont.) Instructions that are used for signal-bit operations are as following:

Checking an Input Bit The JNB and JB instructions are widely used single-bit operations ◦ They allow you to monitor a bit and make a decision depending on whether it’s 0 or 1 ◦ These two instructions can be used for any bits of I/O ports 0, 1, 2, and 3 ◦ Port 3 is typically not used for any I/O, either single-bit or byte-wise

7

7

00

Reading Input Pins vs. Port Latch In reading a port ◦ Some instructions read the status of port pins ◦ Others read the status of an internal port latch ◦ When reading ports there are two possibilities:  Read the status of the input pin  Read the internal latch of the output port  Confusion between them is a major source of errors in 8051 programming  Especially where external hardware is concerned

Reading Latch for Output Port Some instructions read the contents of an internal port latch instead of reading the status of an external pin ◦ For example, look at the ANL P1,A instruction and the sequence of actions is:  It reads the internal latch of the port and brings that data into the CPU  This data is ANDed with the contents of register A  The result is rewritten back to the port latch  The port pin data is changed and now has the same value as port latch

Reading Latch for Output Port (cont.) Read-Modify-Write ◦ The instructions read the port latch normally read a value, perform an operation then rewrite it back to the port latch

Read-modify-write Feature The ports in 8051 can be accessed by the Read-modify-write technique ◦ This feature saves many lines of code by combining in a single instruction all three actions  Reading the port  Modifying it  Writing to the port