Microprocessor Fundamentals Week 5 Mount Druitt College of TAFE Dept. Electrical Engineering 2008

© Mike Stacey 2007 Partial Addressing (p3 sect. 4) Figure 4.4 Partial Address Decoding A13 A14 A15 Partial Address Decoding: is when only some of the address lines are used for selection of ICs, others remaining unused. Simpler PCB design possible but allows a range of addresses to access the same location. Absolute Address Decoding: when ALL of the address lines are used.

© Mike Stacey 2007 Partial Address Problems When is IC1 active? When is IC2 active? A13 – A15 are not connected but they are still used by the CPU Problem is that there will be a number of addresses which will address the same location on each chip.

© Mike Stacey 2007 Partial Address Decoding Problems  IC1 selected when A12 low  or 0000  or 0FFF  or 1000  or 1FFF But 1000 will also select IC1 And so will 2000, 4000, 6000, 7000, 8000, A000, C000, E000. Problem: Each location in IC1 can be addressed using 8 different addresses.  And the same for IC2. Range for IC1 Range for IC2

© Mike Stacey 2007 Addressing Modes Transfer of data from source operand to destination operand MOV AX, BX Source operand Destination operand Opcode

© Mike Stacey 2007 Addressing Modes What is an addressing mode?  Addressing mode is used to describe the way a particular instruction lets the microprocessor know where the source or the destination is located

© Mike Stacey 2007 Addressing Modes Register Direct  Source and destination operands are registers  Simplest type of addressing, fastest, shortest instructions  MOV AX BX: make a copy of contents of reg BX and place it in AX Immediate Addressing  Source is a constant hex value and is written into the destination register  MOV AX, 1A3C: 1A goes into AH, 3C goes into AL

© Mike Stacey 2007 Addressing Modes Memory Direct Addressing  One of the operands (source or destination) is an address in memory  MOV AX,[1234]: moves content of memory location 1234 (effective address) to reg AX  Simplest type for addressing memory but least efficient  Requires at least 3 bytes for the instruction  Inflexible: program must always use this memory location – it’s hard coded in and can’t be changed by the program.

© Mike Stacey 2007 Addressing Modes Indirect Addressing  Uses a “pointer” to point to the source address  MOV AX,[BX]: move the contents of memory at location BX into AX. If BX contains 1234, then memory contents at 1234 are moved.  Flexible: address pointer can be changed from within the program  Usually only 1 byte instruction length More efficient Faster

© Mike Stacey 2007 Addressing Modes Indexed Addressing  Offset added to the base address held in one of the uP internal registers. The offset is in 2s complement format.  MOV AX,[BX + F3]: moves data from address pointed to by BX – 13 to reg AX.  In the 8086 we use a number of “segment” registers to hold the base address of segments in memory Recall MOV CL,[EA]: moves contents of memory location DS:EA into CL. If DS = 490B and EA = 2456, then memory location = 4B506. MOV AX,[BX + 5F]: If DS = 1850, BX = 123F then PA = F + 5F = 1979E MOV AX,[BX + 9B]: PA = F + FFF9B =196DA Positive offset Negative offset