Computers Organization & Assembly Language Chapter 1 THE 80x86 MICROPROCESSOR.

Slides:



Advertisements
Similar presentations
Assembly Language for x86 Processors 6 th Edition Chapter 1: Introduction to ASM (c) Pearson Education, All rights reserved. You may modify and copy.
Advertisements

Computer Organization and Assembly Languages Yung-Yu Chuang
Khaled A. Al-Utaibi  Computers are Every Where  What is Computer Engineering?  Design Levels  Computer Engineering Fields  What.
COE Computer Organization & Assembly Language
Microprocessors I Time: Sundays & Tuesdays 07:30 to 8:45 Place: EE 4 ( New building) Lecturer: Bijan Vosoughi Vahdat Room: VP office, NE of Uni Office.
Pentium 4 and IA-32 ISA ELEC 5200/6200 Computer Architecture and Design, Fall 2006 Lectured by Dr. V. Agrawal Lectured by Dr. V. Agrawal Kyungseok Kim.
Basic Concepts COE 205 Computer Organization and Assembly Language
IA-32 Architecture Computer Organization &
IA-32 Processor Architecture
Vacuum tubes Transistor 1948 ICs 1960s Microprocessors 1970s.
COE Computer Organization & Assembly Language Introduction HLL vs. Assembly Programming Languages.
IA-32 Architecture COE 205 Computer Organization and Assembly Language Dr. Aiman El-Maleh College of Computer Sciences and Engineering King Fahd University.
Basic Concepts Computer Organization & Assembly Language Programming
Basic Concepts COE 205 Computer Organization and Assembly Language
Assembly Language for Intel-Based Computers, 5 th Edition Chapter 1: Basic Concepts (c) Pearson Education, All rights reserved. You may modify.
CS2422 Assembly Language & System Programming September 22, 2005.
Assembly Language for Intel-Based Computers, 5 th Edition Chapter 1: Basic Concepts (c) Pearson Education, All rights reserved. You may modify.
7-Aug-15 (1) CSC Computer Organization Lecture 6: A Historical Perspective of Pentium IA-32.
Basic Concepts Computer Organization and Assembly Language.
Computer Organization and Assembly language
Computer Organization and Assembly Language
ECE 265 – LECTURE 9 PROGRAM DESIGN 8/12/ ECE265.
Computer performance.
Assembly Language for Intel-Based Computers, 5 th Edition Chapter 1: Basic Concepts (c) Pearson Education, All rights reserved. You may modify.
Computer Organization & Assembly Language
Chapter 1: Basic Concepts (c) Pearson Education, All rights reserved. You may modify and copy this slide show for your personal use, or for.
INTRODUCTION TO MICROPROCESSORS
Computer Architecture ECE 4801 Berk Sunar Erkay Savas.
Assembly Language for Intel-Based Computers, 4 th Edition Chapter 2: IA-32 Processor Architecture (c) Pearson Education, All rights reserved. You.
Simultaneous Multithreading: Maximizing On-Chip Parallelism Presented By: Daron Shrode Shey Liggett.
Computer Organization & Assembly Language
Summer 2014 Chapter 1: Basic Concepts. Irvine, Kip R. Assembly Language for Intel-Based Computers 6/e, Chapter Overview Welcome to Assembly Language.
Assembly Language for x86 Processors 7th Edition
The Pentium Processor.
The Pentium Processor Chapter 3 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer,
The Pentium Processor Chapter 3 S. Dandamudi.
IT253: Computer Organization Lecture 4: Instruction Set Architecture Tonga Institute of Higher Education.
1 4.2 MARIE This is the MARIE architecture shown graphically.
Pre-Pentium Intel Processors /
Computers organization & Assembly Language Chapter 0 INTRODUCTION TO COMPUTING Basic Concepts.
University of Washington Roadmap 1 car *c = malloc(sizeof(car)); c->miles = 100; c->gals = 17; float mpg = get_mpg(c); free(c); Car c = new Car(); c.setMiles(100);
History of Microprocessor MPIntroductionData BusAddress Bus
Chapter Six Sun SPARC Architecture. SPARC Processor The name SPARC stands for Scalable Processor Architecture SPARC architecture follows the RISC design.
Hyper Threading Technology. Introduction Hyper-threading is a technology developed by Intel Corporation for it’s Xeon processors with a 533 MHz system.
Ted Pedersen – CS 3011 – Chapter 10 1 A brief history of computer architectures CISC – complex instruction set computing –Intel x86, VAX –Evolved from.
COMPUTER ORGANIZATION AND ASSEMBLY LANGUAGE Lecture 19 & 20 Instruction Formats PDP-8,PDP-10,PDP-11 & VAX Course Instructor: Engr. Aisha Danish.
ECEG-3202 Computer Architecture and Organization Chapter 7 Reduced Instruction Set Computers.
Architecture of Microprocessor
Sahar Mosleh California State University San MarcosPage 1 Assembly language and Digital Circuit By Sahar Mosleh California State University San Marcos.
Chapter 5: Computer Systems Design and Organization Dr Mohamed Menacer Taibah University
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 2 Computer Organization.
Basic Concepts Computer Organization & Assembly Language Programming Instructor: Maram Alsahafi [Some of the contents Adapted from slides Dr Adnan Gutub,
Introduction to Intel IA-32 and IA-64 Instruction Set Architectures.
Suffolk County Community College Mathematics and Computer Science Ammerman Campus CST 121Spring 2013 Section 151CRN: Computer Organization And System.
1 The user’s view  A user is a person employing the computer to do useful work  Examples of useful work include spreadsheets word processing developing.
Addressing modes, memory architecture, interrupt and exception handling, and external I/O. An ISA includes a specification of the set of opcodes (machine.
Introduction to computer software. Programming the computer Program, is a sequence of instructions, written to perform a specified task on a computer.
Chapter Overview General Concepts IA-32 Processor Architecture
CSC235 Computer Organization & Assembly Language
Assembly Language for x86 Processors 6th Edition
Assembly Language (CSW 353)
Roadmap C: Java: Assembly language: OS: Machine code: Computer system:
Microprocessor and Assembly Language
INTRODUCTION TO MICROPROCESSORS
INTRODUCTION TO MICROPROCESSORS
INTRODUCTION TO MICROPROCESSORS
Assembly Language for Intel-Based Computers
Computer Organization and Assembly Language
Introduction to Microprocessor Programming
Introduction COE 301 Computer Organization Prof. Aiman El-Maleh
Presentation transcript:

Computers Organization & Assembly Language Chapter 1 THE 80x86 MICROPROCESSOR

Computers Organization & Assembly Language 2 The 80x86 Microprocessor Brief History of the 80x86 Family Inside the 8088/8086 Introduction to Assembly Language Assembly and Machine Language

Computers Organization & Assembly Language 3 Brief History of the 80x86 Family 8080/8085:  The world’s first general-purpose microprocessor.  8-bit machine, with an 8-bit data bus to memory.  The 8080 was used in the first personal computer.  8-bit registers and 64KB Memory.  Nonpipelined in 1979 :  16-bit machine, with an 16-bit data bus to memory.  16-bit registers and 1 MB Memory.  Pipelined. 8088: 16-bit machine, with an 8-bit data bus to memory. 16-bit registers and 1 MB Memory. Pipelined. Intel Microprocessors

Computers Organization & Assembly Language 4 Brief History of the 80x86 Family was introduced in 1982 : Identical to the 8086 and 8088, except I6 MB Memory. Two modes of operations: Real mode (DOS) with max memory 1 MB. Protected mode (WINDOWS) with 16 MB memory was introduced in 1985 :  First 32-bit machine.  This was the first Intel processor to support multitasking.  Memory 4 GB was introduced 1989 : Full cache technology and pipelining. Built-in math coprocessor. Intel Microprocessors

Intel and Pentium Processors –Improved version of Intel –On-chip Floating-Point unit (DX versions) –On-chip unified Instruction/Data Cache (8 KB) –Uses Pipelining: can execute up to 1 instruction per clock cycle Computers Organization & Assembly Language 5

Pentium (80586) was introduced in 1993 –Wider 64-bit data bus, but address bus is still 32 bits –Two execution pipelines: U-pipe and V-pipe Superscalar performance: can execute 2 instructions per clock cycle –Separate 8 KB instruction and 8 KB data caches –MMX instructions (later models) for multimedia applications Computers Organization & Assembly Language 6

Intel P6 Processor Family P6 Processor Family: Pentium Pro, Pentium II and III Pentium Pro was introduced in 1995 –Three-way superscalar: can execute 3 instructions per clock cycle –32-bit address bus  up to 4 GB of physical address space –Introduced dynamic execution Out-of-order and speculative execution –Integrates a 256 KB second level L2 cache on-chip Pentium II was introduced in 1997 –Added MMX instructions (already introduced on Pentium MMX) Pentium III was introduced in 1999 –Added SSE instructions and eight new 128-bit XMM registers Computers Organization & Assembly Language 7

Pentium 4 and Xeon Family Pentium 4 is a seventh-generation x86 architecture –Introduced in 2000 –New micro-architecture design called Intel Netburst –Very deep instruction pipeline, scaling to very high frequencies –Introduced the SSE2 instruction set (extension to SSE) Tuned for multimedia and operating on the 128-bit XMM registers In 2002, Intel introduced Hyper-Threading technology –Allowed 2 programs to run simultaneously, sharing resources Xeon is Intel's name for its server-class microprocessors –Xeon chips generally have more cache –Support larger multiprocessor configurations Computers Organization & Assembly Language 8

Pentium-M and EM64T Pentium M (Mobile) was introduced in 2003 –Designed for low-power laptop computers –Modified version of Pentium III, optimized for power efficiency –Large second-level cache (2 MB on later models) –Runs at lower clock than Pentium 4, but with better performance Extended Memory 64-bit Technology (EM64T) –Introduced in 2004 –64-bit superset of the IA-32 processor architecture –64-bit general-purpose registers and integer support –Number of general-purpose registers increased from 8 to 16 –64-bit pointers and flat virtual address space –Large physical address space: up to 2 40 = 1 Terabytes Computers Organization & Assembly Language 9

Intel Core MicroArchitecture 64-bit cores Wide dynamic execution (execute four instructions simultaneously) Intelligent power capability (power gating) Advanced smart cache (shares L2 cache between cores) Smart memory access (memory disambiguation) Advanced digital media boost See the demo at mo/demo.htm?iid=tech_core+demo mo/demo.htm?iid=tech_core+demo mo/demo.htm?iid=tech_core+demo Computers Organization & Assembly Language 10

Computers Organization & Assembly Language 11 Brief History of the 80x86 Family Year Introduced Clock rate (M Hz) No. of transistors M Physical Memory64 K 1 M 16 M4 G Internal Data Bus External Data Bus Address Bus Data Types (Bits)888, 16 8, 16, 32

Computers Organization & Assembly Language 12 Inside the 8088/8086

Some Important Questions to Ask What is Assembly Language? Why Learn Assembly Language? What is Machine Language? How is Assembly related to Machine Language? What is an Assembler? How is Assembly related to High-Level Language? Is Assembly Language portable? Computers Organization & Assembly Language 13

A Hierarchy of Languages Computers Organization & Assembly Language 14

Assembly and Machine Language Machine language –Native to a processor: executed directly by hardware –Instructions consist of binary code: 1s and 0s Assembly language –A programming language that uses symbolic names to represent operations, registers and memory locations. –Slightly higher-level language –Readability of instructions is better than machine language –One-to-one correspondence with machine language instructions Assemblers translate assembly to machine code Compilers translate high-level programs to machine code –Either directly, or –Indirectly via an assembler Computers Organization & Assembly Language 15

Compiler and Assembler Computers Organization & Assembly Language 16

Instructions and Machine Language Each command of a program is called an instruction (it instructs the computer what to do). Computers only deal with binary data, hence the instructions must be in binary format (0s and 1s). The set of all instructions (in binary form) makes up the computer's machine language. This is also referred to as the instruction set. Computers Organization & Assembly Language 17

Instruction Fields Machine language instructions usually are made up of several fields. Each field specifies different information for the computer. The major two fields are: Opcode field which stands for operation code and it specifies the particular operation that is to be performed. –Each operation has its unique opcode. Operands fields which specify where to get the source and destination operands for the operation specified by the opcode. –The source/destination of operands can be a constant, the memory or one of the general-purpose registers. Computers Organization & Assembly Language 18

Assembly vs. Machine Code Computers Organization & Assembly Language 19

Translating Languages English: D is assigned the sum of A times B plus 10. High-Level Language: D = A * B + 10 Intel Assembly Language: moveax, A mulB addeax, 10 movD, eax Intel Machine Language: A F C0 0A A A statement in a high-level language is translated typically into several machine-level instructions Computers Organization & Assembly Language 20

Mapping Between Assembly Language and HLL Translating HLL programs to machine language programs is not a one-to-one mapping A HLL instruction (usually called a statement) will be translated to one or more machine language instructions Computers Organization & Assembly Language 21

Advantages of High-Level Languages Program development is faster –High-level statements: fewer instructions to code Program maintenance is easier –For the same above reasons Programs are portable –Contain few machine-dependent details Can be used with little or no modifications on different machines –Compiler translates to the target machine language –However, Assembly language programs are not portable Computers Organization & Assembly Language 22

Why Learn Assembly Language? Accessibility to system hardware –Assembly Language is useful for implementing system software –Also useful for small embedded system applications Space and Time efficiency –Understanding sources of program inefficiency –Tuning program performance –Writing compact code Writing assembly programs gives the computer designer the needed deep understanding of the instruction set and how to design one To be able to write compilers for HLLs, we need to be expert with the machine language. Assembly programming provides this experience Computers Organization & Assembly Language 23

Assembly vs. High-Level Languages  Some representative types of applications: Computers Organization & Assembly Language 24

Assembler Software tools are needed for editing, assembling, linking, and debugging assembly language programs An assembler is a program that converts source-code programs written in assembly language into object files in machine language Popular assemblers have emerged over the years for the Intel family of processors. These include … –TASM (Turbo Assembler from Borland) –NASM (Netwide Assembler for both Windows and Linux), and –GNU assembler distributed by the free software foundation 25 Computers Organization & Assembly Language

Programmer’s View of a Computer System Application Programs High-Level Language Assembly Language Operating System Instruction Set Architecture Microarchitecture Digital Logic Level 0 Level 1 Level 2 Level 3 Level 4 Level 5 Increased level of abstraction Each level hides the details of the level below it Computers Organization & Assembly Language 26

Programmer's View – 2 Application Programs (Level 5) –Written in high-level programming languages –Such as Java, C++, Pascal, Visual Basic... –Programs compile into assembly language level (Level 4) Assembly Language (Level 4) Assembly Language (Level 4) –Instruction mnemonics are used –Have one-to-one correspondence to machine language –Calls functions written at the operating system level (Level 3) –Programs are translated into machine language (Level 2) Operating System (Level 3) –Provides services to level 4 and 5 programs –Translated to run at the machine instruction level (Level 2) Computers Organization & Assembly Language 27

Programmer's View – 3 Instruction Set Architecture (Level 2) –Specifies how a processor functions –Machine instructions, registers, and memory are exposed –Machine language is executed by Level 1 (microarchitecture) Microarchitecture (Level 1) –Controls the execution of machine instructions (Level 2) –Implemented by digital logic (Level 0) Digital Logic (Level 0) –Implements the microarchitecture –Uses digital logic gates –Logic gates are implemented using transistors Computers Organization & Assembly Language 28

Instruction Set Architecture (ISA) Collection of assembly/machine instruction set of the machine Machine resources that can be managed with these instructions –Memory –Programmer-accessible registers. Provides a hardware/software interface Computers Organization & Assembly Language 29

30 Summary Assembly language helps you learn how software is constructed at the lowest levels Assembly language has a one-to-one relationship with machine language Each layer in a computer's architecture is an abstraction of a machine –layers can be hardware or software Computers Organization & Assembly Language