Capfast device Instantiation from RDB Hardware addresses only at this level Macros for: - device names - hardware types - instance params Generated from relational data base
PLC – interlock visualization / verification Naming convention EPICS > PLC Interface definition EPICS > PLC Ø16-bit status register Ø8 interlock status bits Øeach interlock status bit can be a summary (..AND..AND…)
Step-by-step 1.Capture interlock spec in RDB 2.Program PLC (Modicon, Modsoft) 3.Print PLC program to file 4.Perl tool mod2cp >>> meta file 5.Perl tool AdlBuild >>>.adl files 6.Report interlocks from RDB 7.Perl tool ModCheck >>> interlock verification Steps 1, 4, 5, 6, 7 integrated in web-app
On/off control Device with 1-bit control Interlock ok summary Interlock bypass
Interlock ok summary
Time:10:15:25 Date:11/09/04 Segment: 05 Network: #00093 Page: 99 Time: 10:15:25 Date: 11/09/04 ISAC2_VE.ENV Page: 100 Segment: 05 Network: #00094 |IMSRV25_BA IMSRV25_BA IMSRV25_BA IMSRV25_BA IMSRV25_BA IMSRV25_BA IMSRV25_BA IMSRV25_ST |D1 D2 D3 D4 D6 D7 D8 ATINT 1+--+/ / / / / / / ( ) | | | | |device bad device bad device bad|device bad|device bad device bad device bad|device |interlock interlock interlock |interlock |interlock interlock interlock |interlock |stat stat stat |stat |stat stat stat |status | | | | | |IMSRV25_BA| | | |D5 | | / | | | | device bad | | interlock | | stat | | | |IMSRV25_ST | |ATON | | |device on |status | 4+ | |IMSRV25_DR IMSRV25_SP |VOFF ARE ( ) | |