IGBT driving aspect Zhou Yizheng.

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Presentation transcript:

IGBT driving aspect Zhou Yizheng

IGBT driving Driving voltage level Effect of turn on/off Isolation Rge, Cge, Lg Driving capability Isolation Thermal Protection Parasitic turn on Over voltage Short circuit/over current

Driving voltage level Positive voltage Effect to Vcesat Vge,Vcesat Tvj=125C Positive voltage Effect to Vcesat Vge,Vcesat note:max. allowed Vge is 20V Tvj=125C Effect to short cicuit Vge,Isc(tsc)

Driving voltage level Negative voltage Miller capability effect To guarantee safety off state, avoid parasitic miller turn on Turn on delay increase (dead time) Slightly reduce tf and Eoff Increase driving power Miller capability effect

Effect of turn on/off Rgon Control of dv/dt and di/dt with gate resistor Turn-on with smaller than nominal gate resistor: dv/dt = 1.4kV/µs di/dt = 8.7kA/µs ICpeak = 2.7kA Eon = 544mWs Turn-on with nominal gate resistor (datasheet value): dv/dt = 0.9kV/µs di/dt = 6.4kA/µs ICpeak = 2.4kA Eon = 816mWs Turn-on with larger than nominal gate resistor: dv/dt = 0.3kV/µs di/dt = 3.0kA/µs ICpeak = 1.8kA Eon = 2558mWs

Effect of turn on/off Rgoff Control of dv/dt and di/dt with gate resistor dv/dt is controllable with gate resistor. A larger resistor will result in a smaller dv/dt. di/dt is only controllable if the gate voltage doesn’t drop below the Miller Plateau level before IC starts to decrease. This is in general the case for a gate resistor value close to the datasheet value. With larger resistors a control of di/dt starts to work.

Effect of turn on/off Cge Range Determined by Condition Influenced by Independently control of dv/dt and di/dt Range Determined by Condition Influenced by Influence on 1 VGE < VGEth Ciss = const RG, CGE tdon 2 VGEth < VGE < VGEM di/dt 3 VGE = VGEM VGE = const RG, CGC dv/dt

For similar Eon, we can: Rge Cge Eon Di/dt Ipeak tdon Vge_p 4.6ohm 0nf 650mJ 3283kA/ us 1.487kA 1.76us 13.6V 1.7ohm 200nf 635mJ 2492kA/ us 1.386kA 1.67us 13.7V 4.6ohm0nF 1.7ohm200nF

For similar di/dt, we can: Rge Cge Eon Di/dt Ipeak tdon Vge_p 2.6ohm 0nf 437mJ 4270kA/ us 1.639kA 1.29us 14.0V 1.7ohm 46nf 386mJ 4324kA/ us 1.635kA 1.23us 15.0V 2.6ohm0nF 1.7ohm46nF

Rge vs. Cge Using Cge shows better Eon*di/dt coefficient Using Cge can significantly increase driving power P=∆U*(Qge+Cge*∆U)*f Using Cge can significantly increase driving peak current, require more powerful driver (output peak current capability) The tolerance of Cge should be taken care when used in IGBT paralleling application Using Cge may cause gate current oscillation, which leads to higher gate peak voltage.

Cable length influence With short cable With long cable Calbe Rge Cge Eon Di/dt Ipeak tdon Vge_p Short 0.9ohm 0nf 196mJ 6128kA /us 1.978k A 0.92us 14.7V Long 87mJ 6920kA /us 2.220k A 18.3V

For similar Eon, we can: With fixed Cge With fixed Rge Calbe Rge Cge Di/dt Ipeak tdon Vge_p Short 0.9ohm 22nf 210mJ 5882kA /us 1.908k A 0.92us 17.0V Long 1.7ohm 231mJ 5587kA /us 1.874k A 1.21us 17.5V Calbe Rge Cge Eon Di/dt Ipeak tdon Vge_p Short 1.7ohm 22nf 351mJ 4717kA /us 1.711k A 1.17us 15.8V Long 91nf 347mJ 4065kA /us 1.673k A 1.39us 15.6V

Cable length influence Cable length (Lg) shows similar Eon*di/dt coefficient as Rge, This mainly due to Lg effect both during di/dt period and dv/dt period (same as Rge) Long cable significantly induce the turn on delay time Long cable is a EMI receiver, which can cause Vge spike and unstable. Loosing gate cable inductance will significantly increase Eon, which should especially paid attention in active adaptor design. Adaptor board Rge Cge Eon Di/dt Ipeak Active 1.0ohm 0nf 332mJ 5650kA/us 1.708kA Passive(8mm) 187mJ 7700kA/us 1.895kA Long cable should be avoid to be used. But loosing gate inductance should also be paid attention

Effect of turn on/off Driving capability Peak current capability Power capability Maximum driver peak current U = 30V @ 15V switching Driver power Slow down turn on/off speed Driver losses Vge goes down Power supply losses

Effect of turn on/off Turn on/off criteria Redundant information on di/dt and dv/dt 1 2 3 ! 1000 2000 3000 VR(t) [V] IR(t) [A] locus iR(t)*vR(t) 1 2 3 ! Diode SOA

+ - Isolation Optocoupler Optical Fiber High isolation capability Aging of electrical characteristic Reduced reliability due to aging No energy transmission Monolithic Level Shifter Cost effective Integration of logic suitable No galvanic isolation EMI sensitivity Discrete Transformer Very high isolation Capability Energy transmission possible Expensive Device Volume Coreless Transformer (CLT) Very cost effective Easy integration of logic function

Isolation Isolation transformer Isolation test Partial discharge test Parasitic capacitor (Primary - secondary)

Thermal Influenced parameters Module case temperature Driving power (switching frequency, Qg) Driving peak current Sensitive parts Gate resistor Booster Power supply Fiber

Thermal If system internal ambient temperature is known. From delt Tca, we can check temperature rise due to module itself heating Adding temperature rise due to driving signal, real driver board temperature can be gotten. System cooling can significant improve driver cooling condition

Protection UVLO Interlock / generating deadtime Vge over voltage Parasitic turn on Short circuit protection Over voltage protection (for short circuit off) Active Clamping DVRC (Dynamik Voltage Raise Control) di/dt-Feedback Soft-Shut-Down Two-Level Turn-off

Protection UVLO Interlock / generating deadtime Avoid driving IGBT with low voltage causing thermal issue Avoid series break down Interlock / generating deadtime Avoid short through by software mistake Hardware deadtime should be shorter than software deadtime

Gate-Emitter Clamping Protection Limitation of increase of gate voltage due to positive feedback over CGC and due to di/dt Limitation of short circuit currents Vge over voltage Methode 1 Gate-Supply Clamping Methode 2 Gate-Emitter Clamping

Protection Parasitic turn on minus voltage off separate gate resistors, using small Rgoff and big Rgon Additional gate emitter capacitor to shunt the Miller current Active Miller clamping

Protection Short circuit protection Desaturation detect Vce Ic Vce Ic SC I Ic Vce OC SC II

Protection Short circuit protection Desaturation detect Based on fixed reference voltage Based on variable reference voltage

Protection Short circuit protection Desaturation detect Over current protection? Noise immunity is poor Blanking time hard to set for fixed reference voltage concept, especially for high voltage module Current protect point hard to be accurate Directly detect collector current Digital controller to detect di/dt By system current sensor

Protection Over voltage protection Active clamping

Protection Over voltage protection DVRC (Dynamic Voltage Raise Control) uGE(t) iC(t) uCE(t) dic/dt=11kA/µs @ Tj=25°C RG=3.6W EOFF=0.9J +16V -16V PWM IRFD 120 UF4007 100pF RG=1.5W FZ2400R17KE3 47R 15R ZPD16 RMOS 56 BYD77 44H11 45H11 MFP-D MFN-D 3xSM6T220A RAC=15W 4xSM6T220A UAC URAC uGE(t) iC(t) uCE(t) dic/dt=3.4kA/µs @ Tj=25°C RG=13W EOFF=1.95J

Protection Over voltage protection di/dt protection

Protection Over voltage protection Soft shut down

Protection Over voltage protection Two level turn off VGE Driver Out VCE VCE IC IC Without Two-Level Turn-Off VCE reaches 1000V With Two-Level Turn-Off VCE reduced to 640V