Tokyo , Japan; November 1999 International Technology Roadmap for Semiconductors (ITRS 1999) Assembly & Packaging International Technical Working Group.

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Tokyo , Japan; November 1999 International Technology Roadmap for Semiconductors (ITRS 1999) Assembly & Packaging International Technical Working Group Co-Chair: Bob Werner & Chi Shih Chang SEMATECH Inc., Austin, TX U.S.A.

Tokyo , Japan; November 1999 Table 59A/B. Technology Requirements Solutions Exist Solutions Being Pursued No Known Solutions Year of First Product Shipment Technology Generation nm Cost (Cents/Pin) Low cost Hand-held Cost-performance High-performance Harsh Memory Chip Size (mm2) Low cost Hand-held Cost-performance High-performance Harsh Memory nm nm nm nm nm 0.22– – – – – – – – – – – – – – – – – – – – – – – – – ) (C) 0.38– – – – – – – – – – – – – – – – – – – – – – – – –

Tokyo , Japan; November 1999 Solutions Exist Solutions Being Pursued No Known Solutions Year of First Product Shipment Technology Generation nm Power : Single-Chip Package (watts) Low cost Hand-held Cost-performance High-performance Harsh Memory Core Voltage (volts) Low cost Hand-held Cost-performance High-performance Harsh Memory nm nm nm nm nm Table 59A/B (con’t.) n/a n/a

Tokyo , Japan; November 1999 Table 59A/B (con’t.) * Red– To meet package profile -> smaller ball ->coplanarity problem **.65mm ball pitch

Tokyo , Japan; November 1999 Solutions Exist Solutions Being Pursued No Known Solutions Year of First Product Shipment Technology Generation nm Performance : On-Chip (MHz) Low cost Hand-held Cost-performance High-performance Harsh Memory(D/SRAM) Low cost Hand-held Cost-performance High-performance Harsh nm nm nm nm nm Table 59A/B (con’t.) Performance : Chip-to-Board for Peripheral Buses (MHz) /300133/330150/362150/400150/445150/495150/ /300133/330150/362150/400150/445150/495150/ /300133/330150/362150/400150/445150/495150/550 Memory(D/SRAM) / / / /700200/900225/ / / /1100 *

Tokyo , Japan; November 1999 Solutions Exist Solutions Being Pursued No Known Solutions Year of First Product Shipment Technology Generation nm Junction Temperature Maximum ( ℃ ) Low cost Hand-held Cost-performance High-performance Harsh Memory Low cost Hand-held Cost-performance High-performance Harsh nm nm nm nm nm Table 59A/B (con’t.) Memory Operating Temperature Maximum : Ambient ( ℃ ) to to to

Tokyo , Japan; November 1999