Lecture 20: Hardware for Arithmetic Today’s topic –Carry Look-Ahead Adder 1.

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Presentation transcript:

Lecture 20: Hardware for Arithmetic Today’s topic –Carry Look-Ahead Adder 1

2 Speed of Ripple Carry The carry propagates thru every 1-bit box: each 1-bit box sequentially implements AND and OR – total delay is the time to go through 64 gates! We’ve already seen that any logic equation can be expressed as the sum of products – so it should be possible to compute the result by going through only 2 gates! Caveat: need many parallel gates and each gate may have a very large number of inputs – it is difficult to efficiently build such large gates, so we’ll find a compromise:  moderate number of gates  moderate number of inputs to each gate  moderate number of sequential gates traversed

3 Computing CarryOut CarryIn1 = b0.CarryIn0 + a0.CarryIn0 + a0.b0 CarryIn2 = b1.CarryIn1 + a1.CarryIn1 + a1.b1 = b1.b0.c0 + b1.a0.c0 + b1.a0.b0 + a1.b0.c0 + a1.a0.c0 + a1.a0.b0 + a1.b1 … CarryIn32 = a really large sum of really large products Potentially fast implementation as the result is computed by going thru just 2 levels of logic – unfortunately, each gate is enormous and slow

4 Generate and Propagate Equation re-phrased: Ci+1 = ai.bi + ai.Ci + bi.Ci = (ai.bi) + (ai + bi).Ci Stated verbally, the current pair of bits will generate a carry if they are both 1 and the current pair of bits will propagate a carry if either is 1 Generate signal = ai.bi Propagate signal = ai + bi Therefore, Ci+1 = Gi + Pi. Ci

5 Generate and Propagate c1 = g0 + p0.c0 c2 = g1 + p1.c1 = g1 + p1.g0 + p1.p0.c0 c3 = g2 + p2.g1 + p2.p1.g0 + p2.p1.p0.c0 c4 = g3 + p3.g2 + p3.p2.g1 + p3.p2.p1.g0 + p3.p2.p1.p0.c0 Either, a carry was just generated, or a carry was generated in the last step and was propagated, or a carry was generated two steps back and was propagated by both the next two stages, or a carry was generated N steps back and was propagated by every single one of the N next stages

6 Divide and Conquer The equations on the previous slide are still difficult to implement as logic functions – for the 32 nd bit, we must AND every single propagate bit to determine what becomes of c0 (among other things) Hence, the bits are broken into groups (of 4) and each group computes its group-generate and group-propagate For example, to add 32 numbers, you can partition the task as a tree

7 P and G for 4-bit Blocks Compute P0 and G0 (super-propagate and super-generate) for the first group of 4 bits (and similarly for other groups of 4 bits) P0 = p0.p1.p2.p3 G0 = g3 + g2.p3 + g1.p2.p3 + g0.p1.p2.p3 Carry out of the first group of 4 bits is C1 = G0 + P0.c0 C2 = G1 + P1.G0 + P1.P0.c0 … By having a tree of sub-computations, each AND, OR gate has few inputs and logic signals have to travel through a modest set of gates (equal to the height of the tree)

8 Example Add A and B g p P G C4 = 1

9 Carry Look-Ahead Adder 16-bit Ripple-carry takes 32 steps This design takes how many steps?