Introduction to LUSTRE 22c181 Spring 2008. Background Developed in 1980’s at Verimag (Fr) Currently used by Estrel Technologies in Scade development tools.

Slides:



Advertisements
Similar presentations
1 MODULE name (parameters) “Ontology” “Program” “Properties” The NuSMV language A module can contain modules Top level: parameters less module Lower level.
Advertisements

The Synchronous Model of Computation Stavros Tripakis UC Berkeley EE 249 Lecture – Sep 15, 2009 CE 290I Lecture – Oct 22, 2009.
Lecture # 21 Chapter 6 Uptill 6.4. Type System A type system is a collection of rules for assigning type expressions to the various parts of the program.
UPPAAL Introduction Chien-Liang Chen.
1 Translation Validation: From Simulink to C Michael RyabtsevOfer Strichman Technion, Haifa, Israel Acknowledgement: sponsored by a grant from General.
Getting started with ML ML is a functional programming language. ML is statically typed: The types of literals, values, expressions and functions in a.
Ch. 7 Process Synchronization (1/2) I Background F Producer - Consumer process :  Compiler, Assembler, Loader, · · · · · · F Bounded buffer.
SOFTWARE TESTING. INTRODUCTION  Software Testing is the process of executing a program or system with the intent of finding errors.  It involves any.
UPPAAL Andreas Hadiyono Arrummaisha Adrifina Harya Iswara Aditya Wibowo Juwita Utami Putri.
ComS 512 Project John Altidor Michelle Ruse Jonathan Schroeder.
The Spin Model Checker Promela Introduction Nguyen Tuan Duc Shogo Sawai.
10 November JavaScript. Presentation Hints What do YOU think makes a good presentation Some of my suggestions Don’t write full sentences on slides Talk,
Another example p := &x; *p := 5 y := x + 1;. Another example p := &x; *p := 5 y := x + 1; x := 5; *p := 3 y := x + 1; ???
XP 1 Working with JavaScript Creating a Programmable Web Page for North Pole Novelties Tutorial 10.
Penn ESE535 Spring DeHon 1 ESE535: Electronic Design Automation Day 8: February 11, 2009 Dataflow.
Projects. Dataflow analysis Dataflow analysis: what is it? A common framework for expressing algorithms that compute information about a program Why.
Tutorial 4 Decision Making with Control Structures and Statements Section A - Decision Making JavaScript Tutorial 4 -Decision Making with Control.
VHDL. What is VHDL? VHDL: VHSIC Hardware Description Language  VHSIC: Very High Speed Integrated Circuit 7/2/ R.H.Khade.
Principle of Functional Verification Chapter 1~3 Presenter : Fu-Ching Yang.
Introduction to JavaScript for Python Programmers
Basic Elements of C++ Chapter 2.
272: Software Engineering Fall 2012 Instructor: Tevfik Bultan Lecture 4: SMT-based Bounded Model Checking of Concurrent Software.
C++ Programming Language Day 1. What this course covers Day 1 – Structure of C++ program – Basic data types – Standard input, output streams – Selection.
Introduction to VHDL (part 2)
Python quick start guide
Software Testing Sudipto Ghosh CS 406 Fall 99 November 9, 1999.
Timed UML State Machines Ognyana Hristova Tutor: Priv.-Doz. Dr. Thomas Noll June, 2007.
UPPAAL Ghaith Haddad. Introduction UPPAAL is a tool for modeling, validation and verification of real-time systems. Appropriate for systems that can be.
ECE 2372 Modern Digital System Design
Javascript. Outline Introduction Fundamental of JavaScript Javascript events management DOM and Dynamic HTML (DHTML)
 Esterel Technologies, Model Based Development: From system engineering with Simulink to software specification with SCADE then to implementation.
INTRODUCTION TO JAVASCRIPT AND DOM Internet Engineering Spring 2012.
TUTORIAL 10: PROGRAMMING WITH JAVASCRIPT Session 2: What is JavaScript?
The Daikon system for dynamic detection of likely invariants MIT Computer Science and Artificial Intelligence Lab. 16 January 2007 Presented by Chervet.
VHDL IE- CSE. What do you understand by VHDL??  VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Description Language.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
CIS-165 C++ Programming I CIS-165 C++ Programming I Bergen Community College Prof. Faisal Aljamal.
CECS 121 Test 1. Functions allow you to group program statements under one name C and C++ are case-sensitive so main(), MAIN(), and Main() are all different.
Introduction to State Machine
XP Tutorial 10New Perspectives on HTML and XHTML, Comprehensive 1 Working with JavaScript Creating a Programmable Web Page for North Pole Novelties Tutorial.
Liang, Introduction to C++ Programming, (c) 2007 Pearson Education, Inc. All rights reserved X1 Chapter 3 Control Statements.
COE 202 Introduction to Verilog Computer Engineering Department College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals.
Fall 2004EE 3563 Digital Systems Design EE 3563 VHSIC Hardware Description Language  Required Reading: –These Slides –VHDL Tutorial  Very High Speed.
1 Chapter 4: Basic Control Flow ► Chapter Goals  To be able to implement decisions using if statements  To understand statement blocks  To learn how.
Modern VLSI Design 4e: Chapter 8 Copyright  2008 Wayne Wolf Topics VHDL register-transfer modeling: –basics using traffic light controller; –synthesis.
ECE-C662 Lecture 2 Prawat Nagvajara
1 A Balanced Introduction to Computer Science, 2/E David Reed, Creighton University ©2008 Pearson Prentice Hall ISBN Chapter 13 Conditional.
1 Verilog Digital System Design Z. Navabi, 2006 Verilog Language Concepts.
Repetition. Loops Allows the same set of instructions to be used over and over again Starts with the keyword loop and ends with end loop. This will create.
Introduction to ASIC flow and Verilog HDL
04/26/20031 ECE 551: Digital System Design & Synthesis Lecture Set : Introduction to VHDL 12.2: VHDL versus Verilog (Separate File)
Introduction to JavaScript CSc 2320 Fall 2014 Disclaimer: All words, pictures are adopted from “Simple JavaScript”by Kevin Yank and Cameron Adams and also.
A Balanced Introduction to Computer Science, 3/E David Reed, Creighton University ©2011 Pearson Prentice Hall ISBN Chapter 13 Conditional.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
CMPSC 16 Problem Solving with Computers I Spring 2014 Instructor: Tevfik Bultan Lecture 4: Introduction to C: Control Flow.
/ PSWLAB Evidence-Based Analysis and Inferring Preconditions for Bug Detection By D. Brand, M. Buss, V. C. Sreedhar published in ICSM 2007.
CS Class 04 Topics  Selection statement – IF  Expressions  More practice writing simple C++ programs Announcements  Read pages for next.
Activity diagrams Practice 7. Task 1  The first action in the activity is the adding the item to the order. If the order if formed (“ready”), then it.
Homework Reading Machine Projects Labs
Verilog Introduction Fall
Dataflow analysis.
Basic Elements of C++.
2. Specification and Modeling
Introduction to LUSTRE and LUKE
Basic Elements of C++ Chapter 2.
Assertions An assertion is a statement about the design’s intended behavior Assertions can be written in a hardware description language (HDL) Assertions.
Multiple Aspect Modeling of the Synchronous Language Signal
Spring CS 599. Instructor: Jyo Deshmukh
Software Development Chapter 1.
EEL4712 Digital Design (VHDL Tutorial).
Presentation transcript:

Introduction to LUSTRE 22c181 Spring 2008

Background Developed in 1980’s at Verimag (Fr) Currently used by Estrel Technologies in Scade development tools Airbus, nuclear power plants

Synchronous Dataflow Lustre is a synchronous dataflow language Synchronous – outputs are “instantaneous” Designed to quickly react to environment "Realtime” or “reactive” Ex: Esterel, Statecharts Dataflow – changes force propagation Ex: Spreadsheets Simple, modular, functional

Language Nodes Programs or subprograms Collections of flow definitions Flows (or streams) infinite sequence of values Defined equationally (no cycles)

Program Structure node name (parameters) returns (return_vals); [var local_variable_list;] let flow definition; … tel

Basic Types bool and, or, not, xor int real +, -, *, /, div, mod, =, <>,, >=, int,real Tuples Arbitrary combinations of bool, int, real, & tuple terms Used to return multiple values

Luke Tool Command line simulator & verifier Fragment of lustre(v4) language does not support arrays, const, assert, #, when, real allows nonstandard structures nodes with no inputs =, <> can be used on type bool Outputs simulations & counterexamples to javascript webpage

Luke Usage Simulation: luke --node top_node filename Verification: luke --node top_node --verify filename returns either “Valid. All checks succeeded. Maximal depth was n” or “Falsified output ‘X’ in node ‘Y' at depth n” along with a counterexample.

Other Operators pre (previous) pre X :: previous value of X -> (followed by) X -> Y :: value of X in first step, then the value of Y Generally used together: X = Y -> pre Z if … then … else -- :: single-line comment

Clocks Used to delay sampling, execution current, when X = current (Y when B) is not always equivalent to X = if B then Y else pre X Not supported by Luke Y12345 B10010 X= Y when B current X 11144

Odds & Ends (Not supported by Luke) assert(X); When verifying, this statement restricts flows to abide by the Boolean statement X Put known limits on input values const declare (global) constants # :: at most one element of a tuple is true External functions

SCADE Operators SCADE operators (not in version 4): case :: switching fby(x,n,i) :: initialize with i, delay x by n steps Guarded delay i -> pre (i -> … pre (x)) z = condact(b, n, x, i) Guarded clock change z = i -> if b then current n(x when b) else pre z

Arrays,Recursion Supported as syntactic sugar See “A Tutorial of Lustre” for more information

Synchronous Observers Another program which observes the behavior of the base code “Tester node” Contains code to determine if properties are true or not

Traffic Light Example Pedestrian crossing with a traffic light RGY light, walk/don’t walk sign Behavior should be…

Traffic Light Properties Cars & pedestrians not allowed at the same time Only one light color at a time Only walk or don’t walk at a time Y must come between R & G Others…?

Edge Example Compare two implementations of FallingEdge node