Shuvra Das University of Detroit Mercy A/D and D/A Conversion Shuvra Das University of Detroit Mercy

Flowchart of Mechatronic Systems 3

Objective The objective of this section is to describe how the D/A or the A/D converter blocks function. And highlight important issues an user should be aware of.

Analog to Digital Conversion

A/D conversion Sensors usually receive analog data, e.g. sensor signals from thermocouples or strain gages are voltages. These signals are converted to digital form by A/D converters. Modern A/D converters are available as single IC chips (integrated circuit).

Types of A/D converters The tracking ADCs (Analog to Digital converters) The integrating ADCs The flash ADCs successive approximation ADCs

Quantization The process of A/D converting an analog voltage (or current) to digital form requires that the analog signal be quantized and encoded into binary form. Quantization consists of subdividing the range of the signal into a finite number of intervals. Each quantized level is then assigned a binary word. Usually if “n” bits are available in the binary word one employs (2n -1) intervals. (e.g. if n = 4, no. of intervals = 15, if n = 8, no. of intervals = 255, etc).

Quantization:Example Let va represent analog voltage and vd its quantized counterpart Let the analog voltage range be 0-16 V Then for all va lying between 0 and 1 V, vd = 0. For all va between 0and 1 vd=0, 1 and 2, vd = 1, etc, for 15-16 vd= 15.

Quantization:Example 1 2 3 4 5 6 7 1 2 4 5 3 va vd

Quantization As the table shows each quantized voltage level may be represented by a unique binary counterpart. There is always some error associated with quantization. As the number of bits increases the error decreases.

Quantization Error The difference between actual analog voltage and the level to which the quantization assigns the value. Example: If 5 bits are used to represent a 50 V range, what is the quantization error for representing 10 V?

Quantization Error Example: If 5 bits are used to represent a 50 V range, what is the quantization error for representing 10 V? Repeat for 12 V , 31 V, etc for practice. Q = 50V/(25-1)= 1.6129V per level. kQ <= 10 V k needs to be an integer number of levels k <= 10/1.6129=6.2 k = 6 quantized value for 10 = 6*1.6129 = 9.6774 error = 10-9.6774 = 0.3226V

Quantization Error Example: If 8 bits are used to represent a 50 V range, what is the quantization error for representing 10 V? Repeat for 12 V , 31 V, etc for practice. Q = 50V/(28-1)= .19607 V per level. kQ <= 10 V k needs to be an integer number of levels k <= 10/0.19607= 51.002 k = 51 quantized value for 10 = 51*0.19607 = 9.99957 error = 10-9.99957 = 0.00043V

Quantization Error Quantization error may be reduced by using higher number of bits in the A/D converter Typical A/D converters have 8, 12 or 16 bits. In the scheme described earlier Maximum quantization error thus is the length of the quantized level. (Max error: voltage range/(2n-1))

Saturation Error A/D converters have specific upper and lower voltage ranges. Typical values used are 0-10V or -10 to 10 V. If the input signal is higher than the upper limit or lower than the lower limit the converter saturates. This can be prevented by appropriate signal conditioning.

Conversion Time The time required for A/D converter to provide the digital equivalent of the analog output. What happens if analog value changes (time varying signal) before conversion is complete? Sample and hold-maintains constant input to A/D while conversion is taking place.

Conversion Time: sampling rate

Conversion time: Sampling Rate Sampling rate must be at least at twice the frequency of the maximum frequency of interest in the analog signal. This critical sampling rate is called the Nyquist frequency (2fmax). If sampling is not done properly aliasing will occur. Aliasing: Form of signal distortion as a result of improper sampling. In practice about 5-10 times frequency of the signal is used.

Sampling Rate: Example Datasheet for ADC 574 (a particular ADC IC) says that the maximum conversion time is 35micro-sec. What is the highest signal frequency that can be converted with this ADC? Highest conversion frequency for this ADC : fmax = 1/(35 * 10-6) = 28.57kHz Therefore the maximum sampling frequency can be 28.57khz. Therefore the maximum frequency of the signal should not be more than 1/2 of this, i.e. 14 kHz. In reality it should be even less.

Digital to Analog Conversion

D/A conversion Takes a binary word and converts it into an analog signal. Binary word is represented by 1s and 0s where typically 0 corresponds to 0 V and 1 corresponds to 5 V.

Example Consider 4-bit binary word representing a positive number Binary number = (b3b2b1b0)2 = (b3*23+b2*22+b1*21 +b0*20)10 The analog voltage corresponding to the binary word B is va = (b3*8+b2*4+b1*2 +b0*1)dv where dv is the smallest step size by which va can increment.

D/A conversion The step size is determined by the number of bits in the digital word to be converted. Extending the previous example: vamax = (2n-1) dv ==> vamax/(2n-1) = dv This is the smallest change in voltage when the least significant bit changes from 0 to 1.

D/A conversion process A summing amplifier is used. Each bit is represented by a 5 V source and a switch. If bit is 0 switch is off and if bit is 1 switch is on. The output va is proportional to the binary word. Va = -(S(RF/Ri)biVin) Ri=R0/2i

D/A conversion process Va = -(S(RF/Ri)biVin) Ri=R0/2i Va = -RF/R0(2 n-1 bn-1 +2n- 2 bn-2 +..+ 20b0)Vin

Example Consider a 4-bit DAC with 0-15V range (I.e. va max = 15) R’s chosen are 10kohm, 5, 2.5 and 1.25 kohms, RF = 2kohm., Vin=5V dv= 15/(24-1)=1V 0101 ==> -(0*2k/1.25k+ 1*2k/2.5k+0*2k/5k+1*2k/10k)*5 = -5V 1001==> -(1*2k/1.25k+ 0*2k/2.5k+0*2k/5k+1*2k/10k)*5 = -9V

Example Determine the smallest step size (or resolution) of an 8 bit DAC for a range of 0-12 V. Resolution is dv, smallest non-zero voltage value. dv = Voltage range/(2n-1) = 12/(28-1) = 12/255= 47.1milli Volt

Example Find the minimum number of bits required in a DAC if the range is 10 V and a resolution of 10mV is required. dv = (voltage range)/(2n-1) 10(10-3) = 10/ (2n-1) (2n-1) = 10/0.01 n (log2) = log(1000+1) n = log(1001)/log2 = 9.97 minimum bits req. = 10