1 Lab. 5 Transmit Filtering/Up conversion  Digital processing of analog systems: Analog x(t) y(t) ADC Digital DAC x(t)y(t) h(t) DAC: digital to analog.

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1 Lab. 5 Transmit Filtering/Up conversion  Digital processing of analog systems: Analog x(t) y(t) ADC Digital DAC x(t)y(t) h(t) DAC: digital to analog circuit ADC: analog to digital circuit

2  Digital communication system: DAC Analog ADC x(n)y(n) Ideal DACIdeal ADC

3  Transmit filtering (pulse shaping):  Implementation I (analog): DACFilter DigitalAnalog a(n) Analog LPF Pulse shaping

4  Nyquist pulse shaping: ISI-free pulses

5  Raised cosine (RC) pulse: t/Tt/T * Symbol rate=bandwidth

6  Squared root raised cosine pulse (SRRC):  To plot the pulse, we can let the signal in a T (symbol) interval be sampled with M points, i.e., t=n(T/M). Then,

7  Why SRRC:  Note that the pulse shaping filter here is an analog filter and it should have an IIR response.  In reality, the RC and SRRC pulses cannot be generated with analog filters.  Practice 1: –Plot a (sampled) RC pulse and see its spectrum –Plot a SRRC pulse and see its spectrum –Check if the convolution of a SRRC pulse and another SRRC pulse will give you a RC pulse. Filter  a(n)  a(m) Filter Transmitter Receiver SRRC RC

8  Implementation I:  The analog filter may be difficult to implement due to its stringent requirements.  One way to solve the problem is to use a digital filter sharing the analog filtering operation (hybrid filtering). DACFilter DigitalAnalog a(n) Difficult to design

9  Pulse shaping implementation II (hybrid): DACFilter DigitalAnalog  a(n) Filter Digital Digital filter (SRRC) Analog filter Easier to design

10  Practice 2: –Generate a BPSK sequence. –Conduct the SRRC pulse shaping operation with an upsampled factor of 8.  At the receiver side, the operation is reversed. In other words, the pulses are dowsampled to recover the original signal.  Note that the SRRC filter have the non-causal property making a delay required in the output. –For linear-phase FIR filters, the delay is (L+1)/2. –For IIR filters (analog), the delay is found by a derivative in the phase response.

11  For a dowsampling with factor M, there are M possible results (M phases).  There will be one phase giving the best result. In real systems, there is a specific method to find out the phase which is part of synchronization. First phase Second phase

12  Practice 3: –Using the problem in the previous practice, conduct the signal recovery in the receiver side. Filter DigitalAnalog  a(n) Filter Digital Digital filter (SRRC) Filter DigitalAnalog  Filter Digital Digital filter (SRRC) + w(t) DAC * w(n) in simulations Assume it is perfect