EE5316 CMOS MIXED SIGNAL IC DESIGN – PRESENTATION 1 (SELECTION OF ARCHITECTURE) DIGITAL TO ANALOG CONVERTER - Rushabh Mehta, Manthan Sheth The University of Texas at Arlington1

ARCHITECTURE NYQUIST RATEOVERSAMPLINGINTERPOLATING BINARY WEIGHTED Fast Less complex circuitry Prone to mismatch errors THERMOMETER CODED Easy matching Monotonic Better INL & DNL than binary weighted Slower than binary weighted DIRECT ENCODED Low speed due to RC delays Resistor matching difficult HYBRID Contains segments of various other architectures ALGORITHMIC Slow High real estate & power consumption The University of Texas at Arlington2

BINARY WEIGHTED DAC CURRENT STEERING Consumes less real estate Fast for resolution < 10bits High power efficiency R - 2R LADDER High power consumption Good impedance matching Prone to glitch problems CHARGE REDISTRIBUTION DAC Slow due to RC delays Finite bandwidth of opamp The University of Texas at Arlington3

THERMOMETER CODED DAC Converts binary input into thermometer code N binary inputs give 2 n – 1 thermometer coded bits Reference elements are equal in size thus aiding matching of the various elements Monotonic in nature with INL & DNL better than binary weighted DACs The University of Texas at Arlington4

HYBRID DAC Employs a combination of the afore-mentioned architectures Hence includes the advantages of the respective architecture The University of Texas at Arlington5

DOUBLE SEGMENTED THERMOMETER CODED WITH BINARY WEIGHTED CURRENT STEERING For the given specifications, the Double Segmented Thermometer Coded with Binary Weighted Current Steering hybrid architecture is used. It promises to meet the required SFDR and Speed requirements. Double segmented is proposed for reduced area 12 The University of Texas at Arlington6

CIRCUIT IMPLEMENTATION Current Steering implementation for Binary Weighted DAC Segment Current Steering implementation for Thermometer Coded DAC Segment The University of Texas at Arlington7