© 2010 Eric Pop, UIUCECE 598EP: Hot Chips 1 Transient Thermal Response Transient Models –Lumped: Tenbroek (1997), Rinaldi (2001), Lin (2004) –Introduce.

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Presentation transcript:

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips 1 Transient Thermal Response Transient Models –Lumped: Tenbroek (1997), Rinaldi (2001), Lin (2004) –Introduce C TH usually with approximate Green’s functions; heated volume is a function of time (Joy, 1970) –Finite-Element methods Temperature evolution of a step-heated point source into silicon half-plane (Mautry 1990) Simplest (~ bulk Si FET) Instantaneous T rise Due to very sharp heating pulse t ‹‹ V 2/3 / More general Temperature evolution anywhere (r,t) due to arbitrary heating function P(0<t’<t) inside volume V (dV’  V) (Joy 1970)

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips 2 Instantaneous Temperature Rise Neglect convection & radiation Assuming lumped body Biot = hL/k << 1, internal resistance and T variation neglected, T(x) = T = const. Instantaneous T rise Due to very sharp heating pulse t ‹‹ V 2/3 / L W d

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips 3 Lumped Temperature Decay After power input switched off Assuming lumped body R TH = 1/hA C TH = cV Time constant ~ R TH C TH T decay L W d T(t=0) = T H

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Electrical and Mechanical Analogy Thermal capacitance (C = ρcV) normally spread over the volume of the body When Biot << 1 we can lump capacitance into a single “circuit element” (electrical or mechanical analogy) 4 There are no physical elements analogous to mass or inductance in thermal systems

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Transient Edge (Face) Heating 5 Also Lienhard book, When is only the surface of a body heated? I.e. when is the depth dimension “infinite”? Note: Only heated surface B.C. is available

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips If body is “semi-infinite” there is no length scale on which to build the Biot number Replace Biot  (αt) 1/2 6 Note this reduces to previous slide’s simpler expression (erf only) when h=0! Transient Heating with Convective B.C.

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Transient Lumped Spreading Resistance Point source of heat in material with k, c and α = k/c Or spherical heat source, outside sphere This is OK if we want to roughly approximate transistor as a sphere embedded in material with k, c 7 Source: Timo Veijola, Temperature evolution of a step-heated point source into silicon half-plane (Mautry 1990) ~ Bulk Si FET transient Characteristic diffusion length L D = ( αt ) 1/2

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Transient of a Step-Heated Transistor 8 In general: Carslaw and Jaeger (2e, 1986) “Instantaneously” means short pulse time vs. Si diffusion time ( t < L D 2 /α ) or short depth vs. Si diffusion length ( L < (αt) 1/2 )

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Device Thermal Transients (3D) 9

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Temperature of Pulsed Diode 10 Holway, TED 27, 433 (1980)

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Interconnect Reliability 11

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Transient of a Step-Heated Interconnect 12 When to use “adiabatic approximation” and when to worry about heat dissipation into surrounding oxide

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Transient Thermal Failure 13

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Understanding the sqrt(t) Dependence Physical = think of the heated volume as it expands ~ (αt) 1/2 Mathematical = erf approximation 14

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Time Scales of Thermal Device Failure Three time scales: –“Small” failure times: all heat dissipated within defect, little heat lost to surrounding ~ adiabatic (ΔT ~ Pt) –Intermediate time: heating up surrounding layer of (αt) 1/2 –“Long” failure time ~ steady-state, thermal equilibrium established: ΔT ~ P*const. = PR TH 15

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Ex: Failure of SiGe HBT and Cu IC 16 Wunsch-Bell curve of HBT

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Ex: Failure of Al/Cu Interconnects Fracture due to the expansion of critical volume of molten Al/Cu C) 17 Ju & Goodson, Elec. Dev. Lett. 18, 512 (1997) Banerjee et al., IRPS 2000

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Temperature Rise in Vias 18 Via and interconnect dimensions are not consistent from a heat generation / thermal resistance perspective, leading to hotspots. New model accounts for via conduction and Joule heating and recommends dimensions considering temperature and EM lifetime. Based on ITRS global lines of a 100 nm technology node (Left: ANSYS simulation. Right: Closed-Form Modeling) S. Im, K. Banerjee, and K. E. Goodson, IRPS 2002

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Time Scales of Electrothermal Processes 19 Source: K. Goodson

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips ESD: Electrostatic Discharge High-field damage High-current damage Thermal runaway 20 … … J. Vinson & J. Liou, Proc. IEEE 86, 2 (1998)

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Common ESD Models 21 Combined, transient, electro-thermal device models Gate DrainSource J. Vinson & J. Liou, Proc. IEEE 86, 2 (1998) Lumped: Human-Body Model (HBM) Lumped: Machine Model (MM)

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Reliability The Arrhenius Equation: MTF=A*exp(E a /k B T) MTF: mean time to failure at T A: empirical constant E a : activation energy k B : Boltzmann’s constant T: absolute temperature Failure mechanisms: Die metalization (Corrosion, Electromigration, Contact spiking) Oxide (charge trapping, gate oxide breakdown, hot electrons) Device (ionic contamination, second breakdown, surface-charge) Die attach (fracture, thermal breakdown, adhesion fatigue) Interconnect (wirebond failure, flip-chip joint failure) Package (cracking, whisker and dendritic growth, lid seal failure) Most of the above increase with T (Arrhenius) Notable exception: hot electrons are worse at low temperatures 22 Source: M. Stan E a = 1.1 eV E a = 0.7 eV

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Improved Reliability Analysis 23 M. Stan (2007), Van der Bosch, IEDM (2006) life consumption rate There is NO “one size fits all” reliability estimate approach Typical reliability lifetime estimates done at worst-case temperature (e.g. 125 o C) which is an OVERDESIGN Apply in a “lumped” fashion at the granularity of microarchitecture units

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Combined Package Model 24 Steady-state: T j – junction temperature T c – case temperature T s – heat sink temperature T a – ambient temperature

© 2010 Eric Pop, UIUCECE 598EP: Hot Chips Thermal Design Summary Temperature affects performance, power, and reliability Architecture-level: conduction only –Very crude approximation of convection as equivalent resistance –Convection, in general: too complicated, need CFD! Use compact models for package Power density is key Temporal, spatial variation are key Hot spots drive thermal design 25