VLSI Design/ RMC© D. Al-Khalili Devices-2 1 The Threshold Voltage  The voltage applied between the gate and the source which causes the beginning of the.

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VLSI Design/ RMC© D. Al-Khalili Devices-2 1 The Threshold Voltage  The voltage applied between the gate and the source which causes the beginning of the channel surface strong inversion.  Threshold voltage V t is a function of : »V fb = flatband voltage; depends on difference in work function between gate and substrate and on fixed surface charge. »  s = surface potential (  D ). »Gate oxide thickness. »Charge in the channel area. »Additional ion implantation. n Typical values: 0.2V to 1.0V for NMOS and -0.2 to - 1.0V for PMOS

VLSI Design/ RMC© D. Al-Khalili Devices-2 2 Threshold Adjust  An effective mean to adjust the threshold is to change the doping concentration through an ion implantation dose.  NMOS transistors implanted with n-type dopant results in a decrease in threshold voltage  NMOS transistors implanted with p-type dopant results in an increase in the threshold voltage. p Substrate D channel Ion Implantation (dopant) V TO ’=V TO + (q.D I /Cox) D I = dose of dopant in the channel area(atoms/cm 2 ) C ox = gate oxide capacitance per unit area S

VLSI Design/ RMC© D. Al-Khalili Devices-2 3 Threshold Adjust B D G S V SB  Threshold voltage is a function of source to substrate voltage V SB.  Body factor  is the coefficient for the V SB dependence factor.  s is the surface potential ~ -0.6V for NMOS  is the body factor ~ 0.6 to 1.2 V 1/2

VLSI Design/ RMC© D. Al-Khalili Devices-2 4

VLSI Design/ RMC© D. Al-Khalili Devices-2 5 Models for manual analysis NMOS Transistor PMOS Transistor V DSN <V GSN -V TN V DSN >V GSN -V TN V DSP > V GSP -V TP V DSP < V GSP -V TP K N =(W/L)K’ N K P =(W/L)K’ P

VLSI Design/ RMC© D. Al-Khalili Devices-2 6 Dynamic Behavior of MOS Transistor Prentice Hall/Rabaey

VLSI Design/ RMC© D. Al-Khalili Devices-2 7 Diffusion Capacitance Prentice Hall/Rabaey

VLSI Design/ RMC© D. Al-Khalili Devices-2 8 SPICE MODELS

VLSI Design/ RMC© D. Al-Khalili Devices-2 9 MAIN MOS SPICE PARAMETERS Prentice Hall/Rabaey

VLSI Design/ RMC© D. Al-Khalili Devices-2 10 SPICE Parameters for Parasitics Prentice Hall/Rabaey

VLSI Design/ RMC© D. Al-Khalili Devices-2 11 SPICE Transistors Parameters Prentice Hall/Rabaey