eP32 Metacompiler 2012 FIG Taiwan Conference February 17, 2012 Chen-Hanson Ting.

Slides:



Advertisements
Similar presentations
Operating Systems Components of OS
Advertisements

1/1/ / faculty of Electrical Engineering eindhoven university of technology Introduction Part 2: Data types and addressing modes dr.ir. A.C. Verschueren.
Princess Sumaya Univ. Computer Engineering Dept. د. بســام كحـالــه Dr. Bassam Kahhaleh.
Chapter 10- Instruction set architectures
Chapter 8 ICS 412. Code Generation Final phase of a compiler construction. It generates executable code for a target machine. A compiler may instead generate.
SPARC Architecture & Assembly Language
SPIM and MIPS programming
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /17/2013 Lecture 12: Procedures Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL.
2012 FIG Taiwan Conference February 16, 2012 Chen-Hanson Ting
Assembler/Linker/Loader Mooly Sagiv html:// Chapter 4.3.
Intermediate code generation. Code Generation Create linear representation of program Result can be machine code, assembly code, code for an abstract.
Chapter 6 In introduction to System Software and Virtual Machine ***Assembly Language.
Choice for the rest of the semester New Plan –assembler and machine language –Operating systems Process scheduling Memory management File system Optimization.
1 Introduction Chapter What is an operating system 1.2 History of operating systems 1.3 The operating system zoo 1.4 Computer hardware review 1.5.
Chapter 6: An Introduction to System Software and Virtual Machines
Assembler (Basic Functions)
FPGA VHDL eP32 Design 2012 FIG Taiwan Conference February 17, 2012 Chen-Hanson Ting.
CSc 453 Interpreters & Interpretation Saumya Debray The University of Arizona Tucson.
MIPS Instruction Set Advantages
Chapter 6: An Introduction to System Software and Virtual Machines Invitation to Computer Science, C++ Version, Fourth Edition ** Re-ordered, Updated 4/14/09.
Computer Science 210 Computer Organization The Instruction Execution Cycle.
Writing an Assembly-language program Atmel assembly language CS-280 Dr. Mark L. Hornick 1.
328eForth for Arduino Uno C. H. Ting February 16, 2012 SVFIG.
A Portable Virtual Machine for Program Debugging and Directing Camil Demetrescu University of Rome “La Sapienza” Irene Finocchi University of Rome “Tor.
An Introduction Chapter Chapter 1 Introduction2 Computer Systems  Programmable machines  Hardware + Software (program) HardwareProgram.
4-1 Chapter 4 - The Instruction Set Architecture Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring.
Levels of Architecture & Language CHAPTER 1 © copyright Bobby Hoggard / material may not be redistributed without permission.
Machine Instruction Characteristics
IT253: Computer Organization Lecture 4: Instruction Set Architecture Tonga Institute of Higher Education.
4-1 Chapter 4 - The Instruction Set Architecture Department of Information Technology, Radford University ITEC 352 Computer Organization Principles of.
CSC 310 – Imperative Programming Languages, Spring, 2009 Virtual Machines and Threaded Intermediate Code (instead of PR Chapter 5 on Target Machine Architecture)
Cosc 2150: Computer Organization
Computer Systems Organization CS 1428 Foundations of Computer Science.
Chapter 8 Intermediate Code Zhang Jing, Wang HaiLing College of Computer Science & Technology Harbin Engineering University.
CST320 - Lec 11 Why study compilers? n n Ties lots of things you know together: –Theory (finite automata, grammars) –Data structures –Modularization –Utilization.
5-1 Chapter 5 - Languages and the Machine Department of Information Technology, Radford University ITEC 352 Computer Organization Principles of Computer.
4-1 Chapter 4 - The Instruction Set Architecture Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring Principles.
LOLCODE to 6502 Compiler HOW DUZ I PUSH YR POP? MAH TABLES IZ A STACKZ LDA #$1337 ; WAT U SAY?
The Structure of Processes (Chap 6 in the book “The Design of the UNIX Operating System”)
Incell Phonium Processor Design Specifications Dale Mansholt Aaron Drake Jonathan Scruggs Travis Svehla Incell Phonium Processor.
University Of Engineering And Technology Taxila REF::NATIONAL TAIWANOCEAN UNIVERSITY 國立台灣海洋大學 Chapter 3 JUMP, LOOP and CALL Instructions.
Chapter 10 Advanced Programming, PLC Interfacing, and Troubleshooting
5-1 Chapter 5 - Languages and the Machine Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring Principles.
Execution of an instruction
5. Assembly Language. Basics of AL Program data Pseudo-ops Array Program structures Data, stack, code segments.
VHDL Source Code for eP FIG Taiwan Conference February 17, 2012 Chen-Hanson Ting.
1 ECE 372 – Microcontroller Design Assembly Programming HCS12 Assembly Programming Addressing Modes Stack Operations Subroutines.
Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Control Unit.
October 1, 2003Serguei A. Mokhov, 1 SOEN228, Winter 2003 Revision 1.2 Date: October 25, 2003.
Introduction to Language Programming Hierarchy of programming lang. Based on machine independences: 1. Machine language 2. Assembly language 3. Higher.
Intermediate code generation. Code Generation Create linear representation of program Result can be machine code, assembly code, code for an abstract.
Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Control Unit.
Hello world !!! ASCII representation of hello.c.
DEPARTMENT OF ELECTRONICS ENGINEERING V-SEMESTER MICROPROCESSOR & MICROCONTROLLER 1 CHAPTER NO microcontroller & programming.
Writing an Assembly-language program MIPS assembly language using MARS: MIPS Assembler and Runtime Simulator CS-2710 Dr. Mark L. Hornick 1.
“ INSTRUCTIONS SET OF AVR MICROCONTROLLER ” SIGMA INSTITUTE OF ENGINEERING Prepared By: SR.NO NAME OF STUDENT ENROLLMENT 1 Abhishek Lakhara
Invitation to Computer Science 6th Edition
Introduction to Operating Systems
MIPS Instruction Set Advantages
The Forth Language CSC 507 – Roy Ford November 22, 2005.
Computer Architecture and Organization Miles Murdocca and Vincent Heuring Chapter 4 – The Instruction Set Architecture.
Assembly Language Programming Part 2
MICROPROGRAMMED CONTROL
Introduction to Operating Systems
MICROPROGRAMMED CONTROL
HARP Control Divergence & Assignment 4
Welcome to Systems Software
MICROPROGRAMMED CONTROL
MICROPROGRAMMED CONTROL
Hmmm Assembly Language
Presentation transcript:

eP32 Metacompiler 2012 FIG Taiwan Conference February 17, 2012 Chen-Hanson Ting

Summary eP32 Metacompiler eP32 Assembler eP32 Kernel eP32 Interpreter eP32 Compiler eP32 Simulator Demonstration

eP32 Metacompiler eP32 Metacompiler has these components: Metacompiler Assembler eP32 Kernel eForth Interpreter eForth Compiler eP32 Simulator

eP32 Metacompiler Generate an eP32 FORTH system on F# FORTH system Construct the eP32 dictionary in a data array. The data array is imported to the ram_memory.vhd to initialize the eP32_chip.

eP32 Metacompiler FORTH uses commands, (comma) and C, (c-comma) to build new words in dictionary Metacompiler redefines, and C, to build new target words in an array which will become the dictionary in target system

Target Image CREATE ram 8000 ALLOT : ram ; : RAM! ram + ! ;

eP32 Assembler Assemble 1-5 instructions in a 32 bit program word eP32 has two types of instructions : Long Instructions 00 cccccc aaaaaa aaaaaa aaaaaa aaaaaa Short Instructions 00 cccccc cccccc cccccc cccccc cccccc

Short Instructions : INST CONSTANT DOES> ; 08 spread inst ldrp 09 spread inst ldxp ( 0A spread inst ldi) 0B spread inst ldx 0C spread inst strp 0D spread inst stxp 0E spread inst rr8 0F spread inst stx 10 spread inst com 11 spread inst shl 12 spread inst shr 13 spread inst mul 14 spread inst xor 15 spread inst and 16 spread inst div 17 spread inst add 18 spread inst popr 19 spread inst xt 1A spread inst pushs 1B spread inst over 1C spread inst pushr 1D spread inst tx ( 1E spread inst nop ) 1F spread inst pops

Long Instructions : jump CONSTANT DOES> anew R> FFFFFF OR #, ; 0 JUMP bra JUMP bz JUMP bc JUMP call JUMP next

Structured Assembler : if 0 bz ; ( 5F80000 ) : ifnc 0 bc ; ( 5F40000 ) : skip 0 bra ; ( 5FC0000 ) : then begin OVER OR SWAP ram! ; : else skip SWAP then ; : while if SWAP ; : whilenc ifnc SWAP ; : repeat bra then ; : again bra ; : aft ( a -- a' a" ) DROP skip begin SWAP ;

Low/High Level Words : CODE makeHead begin.head CONSTANT DOES> call ; : :: makeHead begin.head CONSTANT DOES> call ; In eP32 system, code words and colon words are the same, all making subroutine calls.

eP32 Kernel FORTH has been always a Virtual Machine, which interprets and compiles FORTH words. Even as eP32 is a true FORTH engine, it still must be converted to a Virtual FORTH machine, with a kernel of FORTH words implemented in eP32 machine instructions.

eForth Interpreter Terminal IO Common utility words Multplication and division Memory read/write Number to text conversion Printing words Text to number conversion Text input Error handling Text interpreter

eForth Compiler Command compiler Structural compiler Tools Defining words Boot up

eP32 Simulator Arrays and variables Finite state machine Machine instruction simulator User interface

eP32 Simulator

Simulation Commands C:Execute next cycle S:Display registers and stacks D:Display 8 program words a M:Display memory a P:Assign next program address a G:Execute till address is G RUN:Single stepping

Demonstration Metacompile a eP32 eForth system Examine symbol table Examine program memory Invoke simulator Compare simulator results and actual eP32 results