Bulk Micromegas Our Micromegas detectors are fabricated using the Bulk technology The fabrication consists in the lamination of a steel woven mesh and.

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Presentation transcript:

Bulk Micromegas Our Micromegas detectors are fabricated using the Bulk technology The fabrication consists in the lamination of a steel woven mesh and photo-sensitive layers on a PCB Geometry Detector : 128 μm amplification gap, 3 mm drift gap Woven mesh : 80 μm pitch, steel wire diameter 20 μm Pillars : 300 μm diameter, 2 mm pitch Pads : square pattern, 1 cm pitch Average number of primary electrons of ~ 30 e-, Gas gain up to a few 10 4, MIP charge of 5-20 fC in 150 ns C. Adloff, 2009 JINST 4 P GeV e- profile in a virtual ECAL, C. Adloff 2010 JINST 5 P01013 Landau distribution in a small chamber (96 pads)

The basic building block of our large area Micromegas chamber is an 8 layer PCB of 32x48 cm 2 It is equipped with 24 ASICs, 1536 pads and a Bulk mesh It is called an Active Sensor Unit (ASU) ASU can be chained thanks to flexible inter-connections They are also equipped with spark protections (diodes) They are read out by 2 boards: DIF & interDIF (cf. photograph) Micromegas boards (ASU) Spark protections Flex. Interconnects to next ASU 24 ASIC + spark protections on back side ASIC Flex. interconnects Mesh HV Power, digital signals, calibration, PC link 32x48 pads of 1 cm 2 on mesh side

Following the ILC beam time structure, the front-end electronics: - is off between bunch trains→ power-pulsing of analogue part; - is on during trains→ self-triggering capability + memory with 200 ns timestamping; It is well suited for both Micromegas and GEMs → Will be used with THGEM during Nov. test beam Front-end electronics The MICROROC is a 64 channel chip developed with LAL/Omega Second level of spark protection Low noise preamp. (3000 ENC) Shapers ( ns) 3 discriminators Memory & timestamp

Electronics calibration: align pedestals to reduce threshold dispersion to ~ 1 fC ASU characterisation Operation inside a gas chamber: 55 Fe quanta peaks above flat (cosmic) background: no noise! trigger efficiency 1 ASIC 1 ASU (24 ASIC)

The 1 m 2 chamber consists of 3 slabs with DIF + interDIF + ASU + ASU This design introduces very little dead zone (below 2%) and is fully scalable to larger sizes The drift gap is defined by small spacers and a frame The final chamber thickness is 9 mm Design of the 1 m 2 chamber Readout boards (DIF+interDIF) Also provide ASIC LV & mesh HV Spacers ASU (mesh) Drift coverFrame with 2 gas pipes

Efficiency & multiplicity VS mesh HV (Standalone test) Efficiency and multiplicity – 2 prototypes inside SDHCAL 287 ASIC Performance to MIPs A high efficiency to MIPs is reached at a gas gain of 3000 (390 V) Due to the small spread of charge in the Micromegas, the hit multiplicity is between at 90° incidence The efficiency variation over 287 ASIC (8x8 cm 2 regions) is 2% RMS, for an average of 96% → Very good control of the chamber dimension and thresholds

Hadron showers contain heavily ionising particles (& a few MIPs) → what is the necessary gas gain? From the distribution of the number of hits at various voltages... probably less than 1000! Indeed, the tails of the distributions at 350 V and 375 V are very similar. 150 GeV π Performance to hadrons 1 λ int of Fe 1 m2 chb. Exp. setup XY occupancy & number of hits traversing pionsshowering pions

The SDHCAL is a 50 layers sampling calorimeter (~ 6 λ int ) of steel absorbers and 1 m 2 active layers During a test beam in May, the SDHCAL was equipped with 48 RPCs and 2 Micromegas All detectors were all read out by a common DAQ Performance inside CALICE/SDHCAL. Pions simultaneously showering in the SDHCAL Colors stand for the 3 thresholds About 500 thousands channels in 1 m 3

The distributions measured in the Micromegas chambers are well reproduced by MC simulation Performance inside CALICE/SDHCAL 100 Gev muons layer 49/ Gev pions layer 49/50 No saturation at the back of SDHCAL → linear response of 3 thresholds low thr ~ 1 fC med. thr ~ 1 MIPhigh. thr ~ 5 MIP Average Nhit versus pion energy

R&D in 2013: Spark Protection in Large Area Micromegas project (SPLAM) Reduce PCB cost by replacing the passive spark protections by a resistive layer on the anode surface We did some simulation and will fabricate and test prototypes Novembre 2012 test beam inside SDHCAL 46 RPCs and 4 Micromegas at layers Identify shower start z 0 with RPCs and measure Nhit in Micromegas chambers w.r.t. z 0 In this way the shower longitudinal profile w.r.t. z 0 can be obtained Integration of the profiles at various energies yields the response of a full Micromegas SDHCAL! Future plans Simulation of the maximum voltage drop on the pads during a spark Shower profiles with 3 Micromegas chambers Simulation