ADD Instruction ADD destination,source ADD AX,BX ADD SUM,EAX destination = destination + source ADD AX,BX ADD SUM,EAX ADD EDX,ARRAY[EBX][ESI] ADD CL,5 ADD DL,[BX]

ADC Instruction ADC destination,source ADC DX,BX ADC COUNT,ECX destination = destination + source + carry ADC DX,BX ADC COUNT,ECX ADC EAX,ARRAY[EBX][ESI]

XADD Instruction XADD destination,source Assume: destination = destination + source Source = original destination Assume: BX = 0AH DX = 11H After XADD BX,DX is executed: BX = 1BH DX = 0AH 80486 and Pentium instruction.

INC Instruction INC operand INC BX INC COUNT INC DWORD PTR [EBX] operand = operand + 1 INC BX INC COUNT INC DWORD PTR [EBX]

SUB Instruction SUB destination,source SUB AX,BX SUB SUM,EAX destination = destination - source SUB AX,BX SUB SUM,EAX SUB EDX,ARRAY[EBX][ESI] SUB CL,5 SUB DL,[BX]

SBB Instruction SBB destination,source SBB DX,BX SBB COUNT,ECX destination = destination - source - carry SBB DX,BX SBB COUNT,ECX SBB EAX,ARRAY[EBX][ESI]

DEC Instruction DEC operand DEC BX DEC COUNT DEC DWORD PTR [EBX] operand = operand - 1 DEC BX DEC COUNT DEC DWORD PTR [EBX]

CMP Instruction CMP operand1,operand2 CMP AL,BL CMP BX,0ABCH Flags are updated and the result is discarded. CMP AL,BL CMP BX,0ABCH CMP DL,[BX]

CMPXCHG Instruction CMPXCHG operand1,operand2 CMPXCHG BL,CL If operand1 = accumulator then accumulator = operand2 Else accumulator = operand1 CMPXCHG BL,CL CMPXCHG DATA,EDX CMPXCHG8B allows the comparison of quad words

MUL and IMUL Instructions MUL operand (unsigned product) IMUL operand (signed product) accumulator = accumulator * operand MUL BL AX = AL * BL MUL CX <DX>:<AX> = AX * CX MUL EBX <EDX>:<EAX> = EAX * EBX

MUL and IMUL Instructions MUL BYTE PTR TEMP AX = AL * TEMP MUL WORD PTR [DI] <DX>:<AX> = AX * [DI] MUL DWORD PTR [EBX] <EDX>:<EAX> = EAX * [EBX]

Special Immediate 16 bit Product IMUL reg,imm IMUL reg,reg,imm IMUL reg,mem,imm IMUL CX,16 CX = CX * 16 IMUL DX,DATA,2 DX = DATA * 2

DIV and IDIV Instructions DIV operand (unsigned division) IDIV operand (signed division) DIV BL AL (quotient) = AX / BL AH (remainder) = AX / BL DIV CX AX (quotient) = <DX>:<AX> / CX DX (remainder) = <DX>:<AX> / CX

DIV and IDIV Instructions DIV EBX EAX (quotient) = <EDX>:<EAX> / EBX EDX (remainder) = <EDX>:<EAX> / EBX DIV BYTE PTR TEMP DIV WORD PTR [DI] DIV DWORD PTR [EBX]

BCD Arithmetic Instructions that use packed BCD operands. DAA - Decimal adjust after addition. DAS - Decimal adjust after subtraction. MOV BL,14H MOV AL,47H ADD AL,BL DAA

ASCII Arithmetic Instructions that use unpacked BCD operands. AAM – Adjust after multiplication. MOV AL,5 MOV BL,8 MUL BL AAM AAD – Adjust before division. MOV AL,12 MOV BL,3 AAD DIV BL

ASCII Arithmetic Instructions that use ASCII operands. AAA – Adjust after addition. AAS – Adjust after subtraction. MOX AX,31H ADD AL,39H AAA ADD AX,3030H

AND Instruction AND destination,source AND AX,BX AND SUM,EAX destination = destination ∙ source AND AX,BX AND SUM,EAX AND EDX,ARRAY[EBX][ESI] AND CL,5 AND DL,[BX]

OR Instruction OR destination,source OR AX,BX OR SUM,EAX destination = destination + source OR AX,BX OR SUM,EAX OR EDX,ARRAY[EBX][ESI] OR CL,5 OR DL,[BX]

XOR Instruction XOR destination,source XOR AX,BX XOR SUM,EAX destination = destination ⊕ source XOR AX,BX XOR SUM,EAX XOR EDX,ARRAY[EBX][ESI] XOR CL,5 XOR DL,[BX]

NOT and NEG Instructions NOT operand – 1’s complement NEG operand – 2’s complement operand = operand’ NOT BX NEG SUM NOT ECX NEG CL

TEST Instruction TEST operand1, operand2 TEST AX,BX TEST SUM,EAX Flags are updated and the result is discarded. TEST AX,BX TEST SUM,EAX TEST CL,5 TEST DL,[BX]

Shift Instructions These instructions perform the logical and arithmetic shifts. SHL destination,count SAL destination,count SHR destination,count SAR destination,count Count can be an immediate value or the CX register. SHL AX,CX SAR DL,1

Rotate Instructions These instructions perform the logical and arithmetic shifts. RCL destination,count ROL destination,count RCR destination,count ROR destination,count Count can be an immediate value or the CX register. ROL EDX,16 RCR BH,CL

Conditional Transfers These instructions conditionally modify the EIP register to be one of two addresses defined as follows: An address or displacement following the instruction (label); The address of the instruction following the conditional jump. Ex: JE SUM SUB EAX,EBX . SUM:

Conditional Transfers Used with unsigned integers JA/JNBE – Jump if above – Z=0 and C=0 JAE/JNB – Jump if above or equal – C=0 JB/JNA – Jump if below – C=1 JBE/JNA – Jump if below or equal – Z=1 and C=1 CMP AL,BL JA NEXT MOV CL,0 . NEXT:

Conditional Transfers Used with signed integers JG/JNLE – Jump if greater – Z=0 and S=0 JGE/JNL – Jump if greater or equal – S=0 JL/JNGE – Jump if less – S<>0 JLE/JNG – Jump if less or equal – Z=1 and S<>0 CMP AL,BL JLE NEXT MOV CL,0 . NEXT:

Conditional Transfers Other conditions JE/JZ – Jump if equal – Z=1 JNE/JNZ – Jump if not equal – Z=0 JC – Jump if carry - C=1 JNC – Jump if not carry – C=0 JS – Jump if sign – S=1 JNS – Jump if not sign – S=0 JO – Jump if overflow – O=1 JNO – Jump if not overflow – O=0

Conditional Transfers JP/JPE – Jump if parity/parity even – P=1 JNP/JPO – Jump if not parity/parity odd – P=0 JCXZ – Jump if CX is zero JECXZ – Jump if ECX is zero

Conditional Set The 80386 and above processors have conditional set instructions. These instructions set a byte to 01H or 00H depending on the value of the flag or condition under test. Example: SETZ COUNT_ZERO

Conditional Set Used with unsigned integers Used with signed integers SETA – Set if above – Z=0 and C=0 SETAE – Set if above or equal – C=0 SETB – Set if below – C=1 SETBE – Set if below or equal – Z=1 and C=1 Used with signed integers SETG – Set if greater – Z=0 and S=0 SETGE – Set if greater or equal – S=0 SETL – Set if less – S<>0 SETLE – Set if less or equal – Z=1 and S<>0

Conditional Set Other conditions SETE/SETZ – Set if equal – Z=1 SETNE/SETNZ – Set if not equal – Z=0 SETC – Set if carry - C=1 SETNC – Set if not carry – C=0 SETS – Set if sign – S=1 SETNS – Set if not sign – S=0 SETO – Set if overflow – O=1 SETNO – Set if not overflow – O=0

Conditional Set SETP/JPE – Set if parity/parity even – P=1 SETNP/SETPO – Set if not parity/parity odd – P=0

Controlling the Flow of the Program Using Dot Commands Dot commands are available for MASM version 6.xx and above. They do not work with Visual C++ inline assembler. When these directives are found the assembler inserts the appropriate instructions that will perform what the directives indicate.

Controlling the Flow of the Program Using Dot Commands .IF, .ELSE, .ELSEIF, and .ENDIF .WHILE, .BREAK, .CONTINUE and .ENDW .REPEAT, .UNTIL, and .UNTILCXZ

.IF, .ELSE, .ELSEIF, and .ENDIF Relational operators used with .IF statements

.IF, .ELSE, .ELSEIF, and .ENDIF INC BL .IF BL >= 205 || BL<= 2 ADD BL,CL .ENDIF MOV DX,1 INC BL .IF BL >= 205 || BL<= 2 CMP BL,205 JAE @C001 CMP BL,2 JA @C002 @C001: ADD BL,CL .ENDIF @C002: MOV DX,1

.WHILE, .BREAK, .CONTINUE and .ENDW The .BREAK statement allows for unconditional exit from loop. The .BREAK statement may be followed by an .IF statement thus allowing for conditional exit from the loop. The .CONTINUE statement behaves in the reverse way as the .BREAK statement. It is always conditional.

.WHILE, .BREAK, .CONTINUE and .ENDW .WHILE BL >= 1 MOV BL, DATA[SI] MOV COPY[SI],BL INC SI .ENDW MOV AX,DX .WHILE BL >= 1 JMP @C001 @C002: MOV BL, DATA[SI] MOV COPY[SI],BL INC SI .ENDW @C001: CMP BL,1 JAE @C002 MOV AX,DX

Procedures Also known as subroutines, these sets of instructions usually perform a single task. They are reusable code, that can be executed as often as needed by calling it. Procedures save memory, but the calling of a procedure takes a small amount of time.

Procedures Format Global procedures are defined as FAR. Name PROC [NEAR or FAR] Subroutine code RET ENDP Global procedures are defined as FAR. Local procedures are defined as NEAR.

Procedures CALL destination RET Calls a subroutine at location destination. Different addressing modes may be used for destination. CALL DELAY CALL EBX CALL ARRAY[BX] RET Returns execution of program to location stored in stack. NEAR or FAR is dependent on procedure definition.

Interrupts INT type INTO – Interrupt if overflow IRET These instructions modify the EIP register to be the address stored at: The IDT. The interrupt type or number is used to identify which element of the IDT holds the addresses of the desired interrupt service subroutines; The stack. The address stored in the stack by the INT or INTO instruction. This address identifies the return point after the interrupts execution.

Miscellaneous Control Instructions WAIT – Delays the execution of the program conditionally to the BUSY’ pin. HLT – It stops execution of software. There are three way to exit a halt instruction: Interrupt; Hardware reset; DMA operation. NOP – No operation. LOCK’ Prefix – Causes LOCK’ pin to become logic 0.

Miscellaneous Control Instructions ESC – Passes information to the numerical co-processor. BOUND – Comparison that may generate an interrupt call. The comparison is between the contents of two words or double words, an upper and a lower boundary. ENTER and LEAVE – Allow the creation and use of stack frames.