Chapter 6 Symbolic Instructions and Addressing

Data Transfer Instructions 資料傳輸指令 The MOV Instruction: [label:] MOV register/memory, register/memory/immediate given the following data items: BYTEFLD DB ? ;define a byte WORDFLD DB ? ;define a word 1. Register Moves MOV EDX, ECX ;register-to-register MOV ES, AX ;register-to-segment register MOV BYTEFLD, DX ;register-to-memory, direct MOV [DI], BX ;register-to-memory, indirect 2. Immediate Moves MOV CX, 40H ;immediate-to-register MOV BYTEFLD, 25 ;immediate-to-memory, direct MOV WORDFLD[BX], 16H ;immediate-to-memory, indirect

3. Direct Memory Moves MOV CH, BYTEFLD;memory-to-register, direct MOV CX, WORDFLD[BX];memory-to-register, indirect 4. Segment Register Moves MOV AX, DS;segment register-to-register MOV WORDFLD, DS;segment register-to-memory You can move to a register a byte, a word, or a double word. Invalid MOV operation: 不合法 MOV DL, WORD_VAL;word-to-byte MOV CX, BYTE_VAL;byte-to-word MOV WORD_VAL, EBX;double-word-to-word MOV BYTE_VAL2,BYTE_VAL1;memory-to-memory MOV ES, 225;immediate-to-segment register MOV ES, DS;segment register-to-segment register

Move-and-Fill Instructions: MOVSX and MOVZX [label:] MOVSX/MOVZX register/memory, register/memory/immediate sign zero MOVSX CX, B;CX= MOVZX CX, B;CX= other examples using MOVSX and MOVZX BYTE1 DB 25 WORD1 DB 40 DWORD1 DD 160 ;double word.386 … MOVSX CX, BYTE1;byte to word MOVZX WORD1, BH;byte to word MOVSX EBX, WORD1;word to double word MOVZX DWORD1, CX;word to double word

The XCHG Instruction: swap the two data items [label:] XCHG register/memory, register/memory WORDQ DW ? … XCHG CL, BH ;exchange contents of two registers XCHG CX, WORDQ ;exchange contents of register and memory

The LEA Instructions: initializing a register with an offset address [label:] LEA register, memory DATATBL DB 25 DUP(?);table of 25 bytes BYTEFLD DB ?;one byte … LEA BX, DATATBL;load offset address MOV BYTEFLD, [BX];move first byte of DATATBL Equivalent operation to LEA: MOV BX, OFFSET DATATBL ;load offset address

Basic Arithmetic Instructions: 基本算數指令 The INC and DEC Instructions: incrementing/decrementing contents of registers and memory locations by 1 [label:] INC/DEC register/memory Note: 1. need only one operand 2. the operations set or clear OF (carry into the sign bit, no carry out) SF (plus/minus), ZF (zero/nonzero) 3. conditional jump instructions may test those flags conditions 4. If content of AL = FFH, INC AL ;increments AL to 00H and sets SF to plus and ZF to zero DEC AL ;decrement AL to FFH and set SF to minus and ZF to nonzero

The ADD and SUB Instructions: [label:] ADD/SUB register/memory, register/memory/immediate Valid operations: register to/from register register to/from memory immediate to/from register immediate to/from memory ADD AX, CX;add register to register ADD EBX, DBLWORD;add memory double word to register SUB BL, 10;subtract immediate from register Flags affected are AF, CF, OF, PF, and ZF

TITLEA06MOVE (EXE) Repetitive move operations.MODEL SMALL.STACK 64.DATA HEADNG1DB 'InterTech' HEADNG2DB 9 DUP ('*'), '$'.CODE A10MAINPROC FAR MOV segment MOV DS,AX; registers MOV ES,AX MOV CX,09;Initialize to move 9 chars LEA SI,HEADNG1;Initialize offset addresses LEA DI,HEADNG2; of HEADNG1 and HEADNG2 A20: MOV AL,[SI];Get character from HEADNG1, MOV [DI],AL; move it to HEADNG2 INC SI;Increment next char in HEADNG1 INC DI;Increment next position in HEADNG2 DEC CX;Decrement count for loop JNZ A20;Count not zero? Yes, loop finished MOV AH,09H;Request display LEA DX,HEADNG2; of HEADNG2 INT 21H MOV AX,4C00H;End processing INT 21H A10MAINENDP END A10MAIN Terminating sign for screen display

1. The program initializes CX to 9 and uses SI and DI for indexing. The program uses the addresses in SI and DI to move the first byte of HEADNG1 to the first byte of HEADNG2. MOV AL, [SI] means to use the offset address in SI to move the referenced byte to AL. MOV [DI], AL means to move the contents of AL to the offset address referenced by DI. 2. The program repeat these two MOV instructions nine times. Two INC increment SI and DI by 1 and DEC decrements CX by 1. DEC also sets or clears the Zero flag used to test conditional jump: JNZ (Jump if Not Zero). 3. To display the contents of HEADNG2, the program (1) loads function 09H in AH to request a display and (2) load the address of HEADNG2 in DX and (3) execute the instruction INT 21H. (Terminating sign for screen display: $)

THE INT INSTRUCTION 1. INT enables a program to interrupt its own processing. INT exits normal processing and accesses the Interrupt Vector Table in low memory to determine the address of the requested routine. The operation then transfers to BIOS or the operating system for specified action. 2. To provide a trail for exiting a program and returning to it after completion 路徑 of an interrupt, INT performs the following:. Pushes the contents of flags onto the stack (and SP decremented by 2). Clears the Interrupt and Trap flags. Pushes the CS register onto the stack. Pushes IP onto the stack. Perform the required operation

To return from the interrupt, the operation issues an IRET (Interrupt Return), which pops the registers of the stack. The restored CS : IP causes a return to the instruction immediately following the INT instruction.

ADDRESSING MODES: an operand address provides a source of data for an instruction to process. Where there are two operands, the first operand is the destination, containing data in a register or memory to be processed, the second operand is the source, containing either the data to be delivered (immediate) or the address (in memory or register) of the data. Basic modes of addressing: Register addressing, Immediate addressing, Direct memory addressing, Direct-offset addressing, Indirect memory addressing, Base displacement Addressing, Base-index addressing, Base-index with displacement addressing

1. Register Addressing: MOV DX, WORD_MEM;register in first operand MOV WORD_MEM, CX;register in second operand MOV EDX, EBX;register in both operands fastest type of operation without referencing memory 2. Immediate Addressing: operand contains a constant value or expression BYTE_VALDB150;define byte WORD_VALDW300;word DBWD_VALDD0;double word … SUBBYTE_VAL,50;immediate to memory MOVWORD_VAL, 40H;immediate to memory MOVDBWD_VAL, 0;immediate to memory MOVAX, 0245H;immediate to register MOV AL, 0245H;Invalid immediate length MOVAX, 48H;valid immediate length

3. Direct Memory Addressing: one of the operand references a memory location, DS is the default segment register for addressing data in memory, as DS : offset ADD BYTE_VAL, DL;add register to memory (byte) MOV BX, WORD_VAL;move memory to register (word) MOVS and COMPS are the only instructions allow both operands to address memory directly. 4. Direct-Offset Addressing: using arithmetic operators to modify an address BYTE_TBLDB12,15,16,22,…;table of bytes WORD_TBLDW163,227,485,…;table of words DBWD_TBLDD465, 563,896,…;table of double words Byte operation: MOV CL, BYTE_TBL[2];get byte from BYTE_TBL MOV CL, BYTE_TBL+2;same operation

Word operation:MOV CX, WORD_TBL[4];get word from WORD_TBL MOV CX, WORD_TBL+4;same operation The MOV accesses the third word of WORD_TBL. Double word operation: MOV ECX, DBWD_TBL[8];get double word from DBWD_TBL MOV ECX, DBWD_TBL+8 ;same operation The MOV accesses the third double word of DBWD_TBL. 5. Indirect Memory Addressing: segment: offset addressing DS:BX, DS:DI, DS:SISS:BP DATA_VAL DB 50;define byte … LEA BX, DATA_VAL;load BX with offset MOV [BX], CL;move CL to DATA_VAL ADD CL, [BX];second operand = DS:BX MOV BYTE PTR [DI], 25;first operand = DS:DI ADD [BP], CL;first operand = SS:BP MOV DX, [EAX];second operand= DS:EAX MOV CX, DS:[38B0H] ;word in memory at offset 38B0H

6.Base Displacement Addressing: using BX, BP, DI, SI + a displacement DATA_TBLDB365 DUP(?) ;define bytes … LEA BX, DATA_TBL ;load BX with offset MOV BYTE PTR [BX+2], 0 ;move 0 to DATA_TBL+2 ADD CL,[DI+12] ;DI offset +12 or 12[DI] SUB DATA_TBL[SI],25 ;SI contains offset (0-364) MOV DATA_TBL[DI], DL ;DI contains offset (0-364).386 MOV DX,[EAX] ;EAX offset + 4 ADD DATA_TBL[EDX], CL ;EDX+ offset DATA_TBL

7. Base-Index Addressing: base register (BX or BP)+ index register (DI or SI) for example: two dimensional array BX references the row and SI the column MOVAX,[BX+SI];move word from memory ADD[BX+DI],CL;add byte to memory 8. Base-Index with displacement Addressing: MOVAX,[BX+DI+10] ;or 10[BX+DI] MOVCL, DATA_TBL[BX+DI] ;or [BX+DI+DATA_TBL].386 MOVEBX,[ECX*2+ESP+4] ;moves into EBX the contents of (ECX*2+(ESP+4))

The Segment Override Prefix: The processor uses CS : IP for fetching an instruction, DS : offset for accessing data in memory SS:SP for accessing the stack When using any instruction to process the data in the other segment, you need to identify it first: MOV DX, ES:[BX] ; move to DX from ES:[BX] MOV ES: [SI+36], CL ;move to ES:[SI+6] from CL The assembler generates OBJ code with the override operator inserted as a 1-byte prefix (26H) immediately preceding the instruction. You can code the two instructions as: ES: MOV DX, [BX] ES: MOV [SI+36], CL Replace normal use of DS with ES

Aligning Data Addresses Because 8086 and have a 16-bit (word) data bus, they execute faster if have 32-bit data bus (double word address) accessed words begin on an even-numbered (word) address. MOV AX, [0012] xx 63 A7 xx Memory contents: offset: When the word begin on an odd-numbered address, the processor has to perform two accesses instead of one. MOV AX, [0013] 1.Accesses bytes at 0012H and 0013H and delivers byte from 0013 to AL 2.Accesses bytes at 0014H and 0015H and delivers byte from 0014 to AH Technically, 486+ prefer alignment on 16-byte (PARA) boundary ALIGN 2 ;aligns on a word boundary ALIGN 4 ; on a double word boundary

Ch6. Exercise: Write a program which defines data items HEADNG1DB ‘F100xxxx','$’,0AH,0DH key in your student number HEADNG2DB 8 DUP ('*'), '$' (1). Move string in HEADNG1 to HEADNG2 backwardly, for example: F => F (2). Display HEADNG1 and HEADNG2 on the screen.