Assembly 02

Outline mov Command Registers Memory EFLAGS Arithmetic 1

mov Command “Moves” data from: register to register memory to register register to memory CANNOT move data from memory to memory (must use register as intermediate step) mov command actually copies data, does not move it 2

mov Command Takes two operands: destination and source mov eax,42 “move (copy) 42 into 32-bit register eax” 3 destination source

mov Command Source and destination must be same size 8-bit byte 16-bit word 32-bit double-word 4

mov Command 5

Immediate Data CPU does not have to “go anywhere” to get data Data comes from instruction itself Only source can be immediate data mov eax,42 6 immediate data

mov Command Source can be ASCII character(s) Must enclose ASCII character(s) with single quotes mov ebx,’ABCD’ 7

8 mov Command mov ebx,’ABCD’ After instruction, contents of 32-bit register ebx: ebx = 0x ‘D’ ‘C’ ’B’ ’A’

mov Command mov ebx,’ABCD’ x86 architecture is little-endian LSB stored at lowest address ebx ‘C’‘D’‘A’‘B’

Outline mov Command Registers Memory EFLAGS Arithmetic 10

Registers x86 has four 32-bit general purpose registers 11 eax ebx ecx edx

Registers x86 has four 16-bit general purpose registers 12 ax bxbx cxcx dxdx

Registers x86 has eight 8-bit general purpose registers 13 ahal bhbl chcl dhdl

Registers 14 ahal eax ax

Registers mov eax, 0x mov ax, 0x2222 mov ah, 0x33 mov al, 0x44 What’s in eax after the instructions execute? Let’s find out.. 15

Registers mov eax, 0x mov ax, 0x2222 mov ah, 0x33 mov al, 0x44 16 eax

Registers mov eax, 0x mov ax, 0x2222 mov ah, 0x33 mov al, 0x44 17 eax 11

Registers mov eax, 0x mov ax, 0x2222 mov ah, 0x33 mov al, 0x44 18 eax 11 22

Registers mov eax, 0x mov ax, 0x2222 mov ah, 0x33 mov al, 0x44 19 eax

Registers mov eax, 0x mov ax, 0x2222 mov ah, 0x33 mov al, 0x44 20 eax

Registers mov eax, 0x mov ax, 0x2222 mov ah, 0x33 mov al, 0x44 21 eax 0x

Registers mov ax, 0x67FE mov bx, ax mov cl, bh mov ch, bl What’s in eax, ebx, and ecx after these instructions execute? Let’s find out… 22

Registers mov ax, 0x67FE mov bx, ax mov cl, bh mov ch, bl 23 eax ebx ecx

Registers mov ax, 0x67FE mov bx, ax mov cl, bh mov ch, bl 24 eax 67FE ebx ecx

Registers mov ax, 0x67FE mov bx, ax mov cl, bh mov ch, bl 25 eax 67FE ebx 67FE ecx

Registers mov ax, 0x67FE mov bx, ax mov cl, bh mov ch, bl 26 eax 67FE ebx 67FE ecx 67

Registers mov ax, 0x67FE mov bx, ax mov cl, bh mov ch, bl 27 eax 67FE ebx 67FE ecx FE67

Registers mov ax, 0x67FE mov bx, ax mov cl, bh mov ch, bl 28 eax ebx ecx 0x67FE 0xFE67

Registers How to swap contents of eax and ebx? Could use three mov instructions Requires a third register mov ecx, eax mov eax, ebx mov ebx, ecx 29

Registers Or, use the xchg mnemonic xchg eax, ebx 30

Outline mov Command Registers Memory EFLAGS Arithmetic 31

Memory Data stored in memory at 32-bit address Segment of addressable memory “owned” by program Operating System controls memory access Why?? Use square brackets to get data stored at memory address Information inside the brackets: “effective address” mov eax, [ ebx ] 32

Memory mov ax, 4 mov bx, [1] 33 ax bx

Memory mov ax, 4 mov bx, [1] 34 4 ax bx

Memory mov ax, 4 mov bx, [1] 35 4 ax 0xBEEF bx

Memory In assembly, variable means address not data var: db 0xAB … mov eax var mov ebx [var] 36 eax ebx

Memory In assembly, variable means address not data var: db 0xAB … mov eax var mov ebx [var] 37 eax ebx this variable declaration instruction must be declared in.data section of assembly code (more on this later)

Memory In assembly, variable means address not data var: db 0xAB … mov eax var mov ebx [var] 38 0x eax ebx 32-bit memory address for var (may change depending on OS)

Memory In assembly, variable means address not data Must use [square brackets] to access data var: db 0xAB … mov eax var mov ebx [var] 39 0x eax 0xAB ebx value stored at address var

Memory Declaring a variable Variable declaration goes in “section.data” section.data x: db 0x01 y: dw 0x2345 z: dd 0x6789ABCD 40

Memory Declaring a variable Variable declaration goes in “section.data” x: db 0x01 41 variable name followed by : variable type db for byte initial value

Memory Declaring a variable Variable declaration goes in “section.data” y: dw 0x variable name followed by : variable type dw for word (16- bits) initial value

Memory Declaring a variable Variable declaration goes in “section.data” z: dd 0x6789ABCD 43 variable name followed by : variable type dd for double word (32-bits) initial value

Memory nasm does not “remember” variable size You must specify either byte, word, or dword (when entering an immediate value) section.data x: db 0x01 … mov [x], byte 0x45 mov al, [x] ; examine variable x 44

Memory nasm does not “remember” variable size You must specify either byte, word, or dword When accessing registers, register size tells assembler what to do section.data y: dw 0x2345 … mov [y], word 0x6789 mov bx, [y] ; examine variable y 45

Memory nasm does not “remember” variable size You must specify either byte, word, or dword section.data z: dd 0x6789ABCD … mov [z], dword 0xACEBEEF0 mov ecx, [z] ; examine variable z 46

Outline mov Command Registers Memory EFLAGS Arithmetic 47

EFLAGS Register 32-bits wide Each bit represents a flag Bit position determines function Check flags for various CPU states When flag is set, it equals 1 When flag is cleared, it equals 0 48

EFLAGS Register Analogous to red flags on row of rural mailboxes 49

EFLAGS Register Each flag has 2-3 letter symbol (for programmer use) Some important flags: OF: overflow flag (bit 11) set when value too large to fit in operand ZF: zero flag (bit 6) set when operand set to zero CF: carry flag (bit 0) set when arithmetic or shift “carries” out a bit 50

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EFLAGS Register How and when flags are set or cleared depends on instruction! Some instructions modify flags, others do not Check Appendix A for information! 52

Outline mov Command Registers Memory EFLAGS Arithmetic 53

Arithmetic add mnemonic Addition Straightforward mul mnemonic Multiplication Nuanced (implicit operand) 54

Arithmetic (add) add dst,src dst = dst + src dst += src destination register gets overwritten with destination + source 55

Arithmetic (add) mov eax,2 mov ebx,3 add eax, ebx 56 eax ebx

Arithmetic (add) mov eax,2 mov ebx,3 add eax, ebx 57 2 eax ebx

Arithmetic (add) mov eax,2 mov ebx,3 add eax, ebx 58 2 eax 3 ebx

Arithmetic (add) mov eax,2 mov ebx,3 add eax, ebx 59 5 eax 3 ebx

Arithmetic (mul) mul mnemonic for multiplication Multiplication slightly more complicated Why? Because products can be VERY LARGE!! Multiplication uses an implicit operand Assumption made by instruction Does not / cannot be changed 60

Arithmetic (mul) mul ebx Destination operand is implicit Not explicitly defined in instruction, but assumed to be present Destination operand always ‘A’ register (eax, ax, al) eax *= ebx 61

Arithmetic (mul) mov eax, 2 mov ebx, 4 mul ebx 62 eax ebx

Arithmetic (mul) mov eax, 2 mov ebx, 4 mul ebx 63 2 eax ebx

Arithmetic (mul) mov eax, 2 mov ebx, 4 mul ebx 64 2 eax 4 ebx

Arithmetic (mul) mov eax, 2 mov ebx, 4 mul ebx 65 8 eax 4 ebx remember, eax is implicit operand

Arithmetic (mul) When you multiply two large 32-bit numbers, you’ll need 64- bits to store the product e.g., 2 31 * 2 31 = 2 62 You can’t store 2 62 in 32 bits… 66

Arithmetic (mul) To get around this, x86 use the ‘D’ register ‘D’ register holds the high-order bits After multiplication, check the CF (carry flag) to see if ‘D’ register is used… If CF is set, D register holds high-order bits 67

Arithmetic (mul) mov eax, 0xFFFFFFFF mov ebx, 0x3B72 mul ebx 68 eax ebx edx 0 CF

Arithmetic (mul) mov eax, 0xFFFFFFFF mov ebx, 0x3B72 mul ebx 69 0xFFFFFFFF eax ebx edx 0 CF

Arithmetic (mul) mov eax, 0xFFFFFFFF mov ebx, 0x3B72 mul ebx 70 0xFFFFFFFF eax 0x3B72 ebx edx 0 CF

Arithmetic (mul) mov eax, 0xFFFFFFFF mov ebx, 0x3B72 mul ebx 71 0xFFFFC48E eax 0x3B72 ebx 0x3B71 edx 1 CF

Arithmetic (mul) mov eax, 0xFFFFFFFF mov ebx, 0x3B72 mul ebx 72 0xFFFFC48E eax 0x3B72 ebx 0x3B71 edx 1 CF carry flag (CF) bit of EFLAGS register is set final product is 0x3B71FFFFC48E edxeax

Arithmetic Division works the same way (implicit operand) See Appendix A for more 73