PicoBlaze CPLD Microcontroller

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Presentation transcript:

PicoBlaze CPLD Microcontroller

Agenda What is PicoBlaze PicoBlaze operation PicoBlaze software flow Customize PicoBlaze Memory integration Why PicoBlaze

What is PicoBlaze? A fully customizable 8-bit soft microcontroller macros that provides 49 16-bit instructions 8 general-purpose 8-bit registers 256 directly and indirectly addressable ports Reset and a maskable interrupt PicoBlaze is a fully embedded 8-bit microcontroller originally targeted to Virtex and Spartan-II devices. The CR-II version has the same instruction set as FPGA version FGPA has 16 general-purpose 8-bit registers, CR-II uses 8 only 256 port addresses can be specified directly by constant or indirectly by the value of a register FGPA uses block ram to store program instructions, CR-II instructions can be save in external memory or can be integrated as a big state machine.

PicoBlaze Block Diagram 8 8 Port Address Control 8 PORT_ID READ_STROBE WRITE_STROBE 8 8 8 8 Registers 8-bit 8 IN_PORT OUT_PORT 8 ALU 8 Interrupt Flag Store ZERO & CARRY Flags Interrupt Control INTERRUPT Similar to a typical microcontroller, PicoBlaze including the instruction decoding block, ALU, program counter and program counter stack, general purpose register bank and port address control. A instruction is decoded and performed by ALU or Flow control, the result sends to a register or to a port 8 Program Counter 8 ADDRESS Program Flow Control 16 Operational Control & Instruction Decoding CONSTANT DATA INSTRUCTION 8 RESET Program Counter Stack CLK

PicoBlaze Operation PicoBlaze 2 clock cycle operation IN_PORT[7:0] OUT_PORT[7:0] PORT_ID[7:0] INTERRUPT READ_STROBE Program ROM RESET WRITE_STROBE INSTRUCTION[15:0] INSTRUCTIOIN[15:0] ADDRESS[7:0] ADDRESS[7:0] CLK CLK 2 clock cycle operation CLK ADDRESS(7:0) 00 01 02 03 04 INSTRUCTION(15:0) 0700 0801 F632 DC5A RESET User code (instructions) store in program rom PicoBlaze fetch the instruction, execute and addressing for next instruction All instructions under all conditions execute over two clock cycles A constant execution rate is a great value for embedded real time design

PicoBlaze Instruction Set Program Control Group JUMP CALL RETURN Logical Group LOAD AND OR XOR Arithmetic Group ADD ADDCY SUB SUBCY Shift & Rotate Group SR0 SR1 SRX SRA RR SL0 SL1 SLX SLA RL Input/Output Group INPUT OUTPUT Interrupt Group RETURNI ENABLE RETURNI DISABLE INTERRUPT ENABLE INTERRUPT DISABLE 49 instructions in 6 groups Q: only 27 instructions here, why? A: reference to appendix A, program control group can be expended to 15 instructions when it combine with the flags.

Assembler A simple DOS executable file Written in C Use Microsoft Visual Studio 6.0 Easy to change The assembler is a DOS program running under DOS window Written in ANSI C and compiled with Microsoft Visual Studio 6.0 It can be easily port to other platform Easy to change for customization

Assembler Files ASM.EXE Filename.asm Filename.mcs Filename.vhd <User input file> ASM.EXE <Binary code for ROM> Filename.mcs Filename.vhd Filename.bin Filename.fmt Filename.log <VHDL for simulation> User writes assembly as input file The assembler generates Mcs file – a binary code to program the external program ROM/EPROM Vhd file – vhdl model can be used for simulation or integration Bin file – a binary code in hex format for debugging Fmt file – a formatted assembly file for documentation Log file – a report <Binary code in hex format> <Formatted assembly file> <Assembler report>

A Simple Shifter Constant shifter_port, 04 ;declare port Namereg s7, shifter_reg ;declare register Loop1: Load shifter_reg, 01 ;init shifter reg Loop2: Output shifter_reg, shifter_port SL0 shifter_reg ;shift left with 0 Jump NZ, loop2 ;goto loop2 when s7<>0 Jump loop1 ;goto loop1 A simple example showing the syntax Complete syntax can be found in appendix A Constant and Namereg are directives provide a way to assign an 8-bit constant value and register to a label Loop1 and loop2 are also address label The first instruction is to load constant ‘1’ into shift register 2nd instruction is to output the shift register to the output port 3rd instruction shift the value left by 1 position 4th instruction checks shift register value and jump to loop2 when the value is not zero (NZ), the address pointer will go to 5 when the value equals zero 5th instruction is unconditional jump to loop1 to make an endless loop This code is for syntax demonstration, not an optimized code

Shifter Program Address Hex Binary 00 0701 01 8F04 02 A706 03 D501 04 0000011100000001 01 8F04 1000111100000100 02 A706 1010011100000110 03 D501 1101010100000001 04 D000 1101000000000000 Load s7, 01 Output s7, 04 SL0 s7 Jump NZ, 01 Jump 00 This is to show how the assembler works The table shows the address and instruction in hex and binary format for each assembly code

PicoBlaze Software Flow Compile PicoBlaze source Use WebPACK 5.2i or later Use FISE 5.2i or later Assemble the program code asm filename.asm Download to the CPLD iMPACT 5.2i or later Download assembled object code to EEPROM This is a software flow for picoblaze application development User compiles the picoblaze vhdl by using webpack Develop assembly code for application and run picoblaze assembler on DOS window Download the picoblaze to cpld and assembled binary code to ROM or EEPROM

Making a Processor Change Add an instruction Modify picoblaze.vhd Add a constant with instruction code: constant new_instruction_id : std_logic_vector(4 downto 0) := “10101"; Add instruction decoding signal i_new_instruction <= '1' when instruction(15 downto 11) = new_instruction_id else '0'; Define VHDL component with functionality of new instruction Add new component to picoblaze.vhd Tweak the assembler Add new instruction to asm.cpp char *new_instruction_id = “10101“; Add case to write_program_word function of asm.cpp Recompile asm.cpp to create asm.exe This is to explain how to customize the picoblaze Add an instruction to vhdl and assembler The vhdl and c code is made very easy for customization The code can be download from xilinx website, reference xapp387

Making a Processor Change A DSP example - bit reversal (“Flip”) operation 12 to 18 instructions needed in regular microcontroller programming A newly created FLIP function in PicoBlaze can be used to complete the operation in just one instruction cycle This is an example to show a new instruction FLIP to do a bit reversal operation It will take 12 to 18 instructions without create this new instruction The new instruction can be complete in one instruction cycle

Macrocell Usage This is a table to show the possible functions can be added to CR-II and their macrocell usage

Program Memory Integration Binary code and processor can be integrated into a single CPLD Eliminates external PROM SOC solution Reduces size Increases performance It is possible to integrate the external instruction memory into a single CR-II device Dependent on applications, it can reduce the size and increase performance

Integration Design Flow Assemble the design Use PicoBlaze Assembler asm design.asm Generates design.vhd Write top level VHDL Wrap picoblaze.vhd and design.vhd (output from assembler) Compile top level VHDL source Use WebPACK 5.2i or later Use FISE 5.2i or later Download to CPLD Use iMPACT 5.2i or later

1 + 1 < 2 PicoBlaze PicoBlaze + Shifter Macrocells Product Terms Registers FB Inputs Fmax 212/256 ( 83%) 642 /896 ( 72%) 155/256 ( 61%) 451/640 ( 70%) 30 MHz PicoBlaze + Shifter Macrocells Product Terms Registers FB Inputs Fmax 107/256 ( 42%) 341 /896 ( 38%) 82 /256 ( 32%) 208/640 ( 32%) 87 MHz This is the shifter example It uses 212 macrocells for a stand alone picoblaze core and runs 30 MHz Once the shifter integrated into picoblaze to perform this specific task The macrocell count reduced to 107 and speed increased to 87 MHz - Fitter removes redundant circuits

PicoBlaze Demonstration Demonstrate simple shifter Add FLIP instruction Exchanges bits in specified register MSB to LSB LSB to MSB Modify picoblaze.vhd Create FLIP component Modify asm.cpp Demonstrate FLIP instruction with new program Here to demonstrate a newly added FLIP instruction First to load the shifter on the part and show LED shifting Recompile the FLIP code and download the new design to CR-II on the fly (OTF) Show LED change from shifting into flipping instantly

Why Use PicoBlaze? Emulate out of production processors Lower power consumption than older small processors Customizable for performance PicoBlaze runs faster than most 8-bit and16-bit uCs (PICs, 8051, 6811, 80188, 6816, etc.) Customizable for specific applications uCs have fixed features uCs have fixed instructions sets PicoBlaze can run functions quickly in parallel logic Many advantages to use picoblaze than uCs

Why Use PicoBlaze? PicoBlaze is parameterized uCs have fixed size uCs have limited I/Os Can be reconfigured “On the Fly (OTF)” Cryptography/security More advantages

Conclusion PicoBlaze is a soft microcontroller module Use PicoBlaze for custom microcontroller applications Create custom instruction sets Program memory integration Use PicoBlaze Assembler Compile with current Xilinx software

CoolRunner-II Reference Designs Free HDL CoolRunner-II design code download: http://www.xilinx.com/products/xaw/coolvhdlq.htm

Appendix A Instruction set descriptions Syntax Bit description

Program Syntax No blank lines – Use a semicolon for blank lines Comments – Any item on a line following a semicolon (;) Constant – Must be specified in the form of a 2 digit hexadecimal value(00 – FF) Line Labels – To identify a program line for JUMP or CALL instruction should be followed by a colon (:) CONSTANT Directive – Assigns an 8-bit constant value to a label NAMEREG Directive – Assigns a new name to any of the 8 registers ADDRESS Directive – Forces the following instructions commencing at a new address value

Program Control I C A 1 1 1 JUMP CALL RETURN Address Unconditional JUMP aa JUMP Z, aa JUMP NZ, aa JUMP C, aa JUMP NC, aa CALL aa CALL Z, aa CALL NZ, aa CALL C, aa CALL NC, aa RETURN RETURN Z RETURN NZ RETURN C RETURN NC 1 JUMP CALL RETURN Address I C A 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Unconditional Conditional 1 1 if Zero if NOT Zero if Carry if NOT Carry Instruction syntax

Interrupt Control I C 1 1 INTERRUPT RETURNI Don’t Care Enable Disable Instruction syntax INTERRUPT ENABLE INTERRUPT DISABLE ENABLE INTERRUPT DISABLE INTERRUPT 1 INTERRUPT RETURNI Don’t Care I C 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Enable Disable 1

Logical Operation I X Y K C 1 1 LOAD sX, C AND sX, C OR sX, C LOAD sX, KK AND sX, KK OR sX, KK XOR sX, KK LOAD sX, sY AND sX, sY OR sX, sY XOR sX, sY C 1 LOAD sX, C AND sX, C OR sX, C XOR sX, C Constant I X Y K 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Instruction syntax sX sY 1 K sY

Arithmetic Operation I X Y K C 1 1 ADD sX, C ADDCY sX, C SUB sX, C ADD sX, KK ADDCY sX, KK SUB sX, KK SUBCY sX, KK ADD sX, sY ADDCY sX, sY SUB sX, sY SUBCY sX, sY C 1 ADD sX, C ADDCY sX, C SUB sX, C SUBCY sX, C Constant I X Y K 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Instruction syntax sX sY 1 K sY

SHIFT/ROTATE 1 X C D 1 1 SR0/SL0 SR1/SL1 SRX/SLX SRA/SLA RR/RL SR0 sX SR1 sX SRX sX SRA sX RR sX SL0 sX SL1 sX SLX sX SLA sX RL sX SR0/SL0 SR1/SL1 SRX/SLX SRA/SLA RR/RL 1 1 1 Carry Instruction 1 X C D 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 sX 1 L - Left R - Right Instruction syntax

Input/Output Control I X Y P 1 C 1 Input Output Constant PORT_ID sX sY INPUT sX, PP INPUT sX, sY OUTPUT sX, PP OUTPUT sX, sY 1 C Input Output Constant PORT_ID Instruction syntax I X Y P 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 sX sY 1 P sY