68HC11 Analog I/O Chapter 12.

Slides:



Advertisements
Similar presentations
H. Huang Transparency No.11-1 The 68HC11 Microcontroller Chapter 11: 68HC11 Analog to Digital Converter The 68HC11 Microcontroller Han-Way Huang Minnesota.
Advertisements

Chapter 12: Analog Converter Subsystem
Lecture 17: Analog to Digital Converters Lecturers: Professor John Devlin Mr Robert Ross.
Data Acquisition ET 228 Chapter
ELEC 330 Digital Systems Engineering Dr. Ron Hayne
Analog to Digital Converters Byron Johns Danny Carpenter Stephanie Pohl Harry “Bo” Marr October 4, 2005.
ECE 265 – LECTURE 14 Analog Signal Acquisition The A/D converters 5/14/ ECE265.
CE 478: Microcontroller Systems University of Wisconsin-Eau Claire Dan Ernst Analog to Digital (and back again) Interfacing a microprocessor-based system.
A/D and D/A. Overview Introduction oDefinitions oOp amps -- a quick review Digital-to-analog conversions Analog-to-digital conversions Reading: Text,
Analog to Digital Conversion. Introduction  An analog-to-digital converter (ADC, A/D, or A to D) is a device that converts continuous signals to discrete.
Analog to Digital Conversion. 12 bit vs 16 bit A/D Card Input Volts = A/D 12 bit 2 12 = Volts = Volts = 2048 −10 Volts = 0 Input Volts.
LSU 06/04/2007Electronics 71 Analog to Digital Converters Electronics Unit – Lecture 7 Representing a continuously varying physical quantity by a sequence.
Chapter 11 Analog I/O Interfacing From Introduction to Embedded Systems by Valvano.
Shuvra Das University of Detroit Mercy
Analog Comparator Positive input chooses bet. PB2 and Bandgap Reference. Negative input chooses bet. PB3 and the 8 inputs of the A/D. ACME= Analog Comparator.
What is ADC ? Types of ADCs HC11 & ADC Analog to Digital Converter Denis BISSIERES Ian CAMPBELL Yohan LESPERAT Mechatronics - Fall 04.
Analogue to Digital Conversion
ECT 357 Ch 10 Analog to Digital COnversion. Today’s Quote: It’s better to die with a good name than to live with a bad one. It’s better to die with a.
Introduction to Data Conversion
ADC STUDENT LECTURE Andrew Brown Jonathan Warner Laura Strickland.
68HC11 Polling and Interrupts
H. Huang Transparency No.11-1 The 68HC11 Microcontroller Chapter 11: 68HC11 Analog to Digital Converter The 68HC11 Microcontroller Han-Way Huang Minnesota.
PH4705/ET4305: A/D: Analogue to Digital Conversion
Data Acquisition. Data Acquisition System Analog Signal Signal Conditioner ADC Digital Processing Communication.
Week #7 Data Acquisition System, Part (A)
Digital to Analogue Conversion Natural signals tend to be analogue Need to convert to digital.
DEEPAK.P MICROPROCESSORS AND APPLICATIONS Mr. DEEPAK P. Associate Professor ECE Department SNGCE 1.
Computer Based Data Acquisition Basics. Outline Basics of data acquisition Analog to Digital Conversion –Quantization –Aliasing.
Assembly Language Programming for the MC68HC11. Assembly language programming  Recall the 4 design levels for software development: – Application – High.
ELE22MIC Lecture 19, 20, 21 Edge Detector Latch vs Flip Flop
1 ATD10B8CV2 on MC9SI2C By: Yuchun Huang. 2 ADC ADC Power Supply.
ACOE2551 Microprocessors Data Converters Analog to Digital Converters (ADC) –Convert an analog quantity (voltage, current) into a digital code Digital.
Digital to Analogue Converter
ELN5622 Embedded Systems Class 7 Spring, 2003 Aaron Itskovich
ELE2MIC Lecture 21 The AVR Sleep Modes ATMEGA128’s Analog to Digital Converter –Features –Block Diagram –Clock Source –Input Sources –Interrupts –BandGap.
(More) Interfacing concepts. Introduction Overview of I/O operations Programmed I/O – Standard I/O – Memory Mapped I/O Device synchronization Readings:
Instrumentation (AMME2700) 1 Instrumentation Dr. Xiaofeng Wu.
Revised: Aug 1, ECE 263 Embedded System Design Lessons HC12 Analog-to-Digital (ATD) Converter System.
Data Acquisition ET 228 Chapter 15 Subjects Covered Analog to Digital Converter Characteristics Integrating ADCs Successive Approximation ADCs Flash ADCs.
1 68HC11 Timer Chapter HC11 Timer Subsystem Several timing functions: Basic timing Basic timing Real time interrupts Real time interrupts Output.
1 October 26, 2006ME 6405 MechatronicsSerial Communication Interface Brian Guerriero Jon Rogers Robert Thiets.
The Silicon Laboratories C8051F020
Analog Capture- Port E. Digital to Analog and Analog to Digital Conversion D/A or DAC and A/D or ADC.
© 2009, Renesas Technology America, Inc., All Rights Reserved 1 Course Introduction  Purpose:  This course provides an overview of the serial communication.
Analog/Digital Conversion
Data Acquisition System
Parallel I/O. Introduction This section focuses on performing parallel input and output operations on the 68HC11 3 operation types – Simple, blind data.
ECE 2799 Electrical and Computer Engineering Design ANALOG to DIGITAL CONVERSION Prof. Bitar Last Update:
ECE 447: Lecture 2 Internal Input/Output Devices A/D Converter.
0808/0809 ADC. Block Diagram ADC ADC0808/ADC Bit μP Compatible A/D Converters with 8-Channel Multiplexer The 8-bit A/D converter uses successive.
George W. Woodruff School of Mechanical Engineering, Georgia Tech ME4447/6405 ME 4447/6405 Microprocessor Control of Manufacturing Systems and Introduction.
ADC 1 Analog to Digital Converter. ADC 2 ADC Features n General Features -Supports 8 or 10-bit resolution Modes, -Track period fully programmable up to.
Electronic instrumentation Digitization of Analog Signal in TD
MECH 373 Instrumentation and Measurements
Microprocessors Data Converters Analog to Digital Converters (ADC)
Analog-to-Digital Converter
Analog to Digital Converters Electronics Unit – Lecture 7
Chapter 2 Signal Sampling and Quantization
Digital Acquisition of Analog Signals – A Practical Guide
ME 4447/6405 Microprocessor Control of Manufacturing Systems and
Converter common specs
Lesson 8: Analog Signal Conversion
PIC18F458 Analog-to-Digital
Converter common specs
Conversation between Analogue and Digital System
ADC and DAC Data Converter
Converter common specs
Indexing Through Memory
Chapter 7 Converters.
ADC and DAC Data Converter
Presentation transcript:

68HC11 Analog I/O Chapter 12

Analog to Digital Converter (ADC) What is it? Converts an analog voltage level to a digital output. Dout = F(Vin)

Analog to Digital Converters Terminology Full Scale Voltage: VFS=VH-VL Difference between maximum and minimum voltage levels Bits (N): Number of bits in the digital output Resolution (LSB): smallest quantizing step size LSB = Vfs/2N Conversion time: time needed for one conversion Quantization error: Voltage error between digital output and analog input. The maximum error is 1 LSB

Analog to Digital Converters In General Given: VFS, N bits LSB = VFS/(2N) Digital Output: Dout Analog Output: Vout Vout = Dout*LSB = Dout * VFS/2N Quantization Error = Vin - Vout

Analog to Digital Converters Example Given: VFS=5V, N=2 bit What is the bit resolution (LSB) and the transfer curve Answer: LSB = 5/(22) = 1.25V 0.000V < Vin < 1.25V  Dout = 00 1.25V < Vin < 2.50V  Dout = 01 2.50V < Vin < 3.75V  Dout = 10 3.75V < Vin < 5.000V  Dout = 11

2-bit Analog to Digital Converter Voltage Transfer Curve Dout Vin, V

Analog to Digital Converters Example Given: VFS=5V, N=8 bits What is Dout (in hex) for Vin=2.35V Answer: LSB = 5/(28) = 0.0195V = 19.5mV 2N = 256 Dout = INT(2.35V/19.5mV)=120=$78

Analog to Digital Converters Example Given: VFS=5V, N=8 bits, Dout=$78 What is the quantization error (in mV) if Vin=2.35V Answer: LSB = 5/(28) = 0.0195V = 19.5mV Vout = Dout*LSB = 120*19.5mV=2.34V QE = Vout – Vin = 2.35V-2.34V = 10mV

68HC11 A/D Converter 8-bit resolution (256 bit levels) 8 channels: Port E

Port E 8-bit Address $100A Multi-Function Digital Input Port Analog Input Port (Built-in A/D)

Port E - $100A Data Register 7 6 5 4 3 2 1 Bits O=Output I =Input B=Bidirectional

Using the 68HC11 A/D Converter Power-up the A/D System Configure the A/D conversion system Two modes Single channel scan Continuous channel scan Channel control Conversion on a single channel Conversion on four channels Start the A/D conversion Poll the conversion completion flag (CCF) Read the result Save the result

Reading the Results Load the ADC result from the ADC Input Registers: ADR1 = $1031 ADR2 = $1032 ADR3 = $1033 ADR4 = $1034

Power the A/D Converter Option Register: $1039 System Configuration Options ADPU CSEL IRQE DLY CME N/A CR1 CR2 7 6 5 4 3 2 1 Bits ADPU = A/D Power-up 0 = A/D not powered up 1 = A/D powered up (need at least 100uS for process to stabilize) CSEL = Clock select 0 = Use external clock (E-clock) for power up (default) 1 = Use internal clock for power up CB = %11000000

Configure the ADC A/D Control/Status Register ADCTL Register: $1030 A/D Control/Status Register CCF N/A SCAN MULT CD CC CB CA 7 6 5 4 3 2 1 Bits SCAN = Continuous Scan Control 0 = One cycle of four conversions each time ADCTL is written 1 = Continuous conversions MULT = Multiple Channel/Single Channel Control 0 = perform four consecutive conversions on a single channel 1 = perform four conversions on four channels consecutively

A/D Control/Status Register Single Channel Mode ADCTL Register: $1030 A/D Control/Status Register CCF N/A SCAN MULT CD CC CB CA 7 6 5 4 3 2 1 Bits CD,CC,CB,CA = Channel Conversion Select Bits Mult=0

A/D Control/Status Register Multiple Channel Mode ADCTL Register: $1030 A/D Control/Status Register CCF N/A SCAN MULT CD CC CB CA 7 6 5 4 3 2 1 Bits CD,CC,CB,CA = Channel Conversion Select Bits Mult=1

A/D Control/Status Register Conversion Completion Flag ADCTL Register: $1030 A/D Control/Status Register CCF N/A SCAN MULT CD CC CB CA 7 6 5 4 3 2 1 Bits CCF = A/D Conversion Complete Flag 0 = Conversion not complete 1 = Conversion complete. Set when all four A/D result registers contain valid conversions

Project Pseudo-Code * Power ADC using Internal Clock * Delay Loop Option ($1039)  %11000000 * Delay Loop N=10 For I = 1 to N Next I * Configure ADC for * Single channel, single scan, PE0 * Set scan=0,mult=0, Cd,Cc,Cb,Ca to 0000 ADCTL  %00000000 ; This starts conversion

Project Pseudo-Code * Wait for CCF Flag * Read Result * Save Result * Repeat Until CCF=1 * Read Result A  ADR1 ($1031) * Save Result Dout  A *

TPS Quiz

Initialization Examples Single channel, single scan Set scan=0,mult=0 Set Cd,Cc,Cb,Ca to select channel Single channel, continuous scan Set scan=1,mult=0

Initialization Examples Multiple channel, single scan Set scan=0,mult=1 Set Cd,Cc,Cb,Ca to select channel pair Either PE0-PE3 or PE4-PE7 Multiple channel, continuous scan Set scan=1,mult=1

Pseudo-code:Multi-Channel Mode 68HC11 A/D Converter Initialize A/D conversion system Power A/D system Enable A/D system ; This starts A/D conv. Repeat Until CCF=1 For n = 1 to 4 A  ADR(n) ; Read ADC register n Out(n)  A ; Save conversion Next n

A/D Subroutine **** Define Symbols *** Assume standard equates OPTION EQU $1039 ADCTL EQU $1030 ADR1 EQU $1031 ADPU EQU %11000000 ADC EQU %00010100 ; Single scan-multi channel ; PE4-PE7 CCF EQU %10000000 ; CCF Delay EQU $1010 ; this is the delay N EQU $04

A/D Subroutine **** Initialize the Interface **** X contains the address of the output string **** B contains the number of values to collect Org Program Start: LDY #Option ; Load address of A/D option register BSET 0,Y #ADPU ; This power ups the A/D LDAA #Delay Loop: DECA BNE Loop ; This delay allows the A/D to power up LDAA #PE0 ; This are the bits to configure the ADCTL STAA ADCTL ; Configure ADCTL and start conversion

A/D Subroutine LDY #ADCTL ; This is the address of the ADCTL L0: BRCLR 0,Y #CCF L0 ; Stay here until CCF is set LDAB #N L1: LDY #ADR1 LDX #OUT LDAA 0,Y ; This will load the first conversion STAA 0,X ; Save this conversion INX ; Point to next character INY DECB BNE L1 RTS ; Return from subroutine ORG Data OUT RMB 4

Maximum Sampling Rate Nyquist Theorem: Must sample at twice the maximum frequency of the input signal to reconstruct the signal from the samples. 68HC11 Conversion time: 32 clock cycles = 32Tc Maximum signal period: 1/(2Fmax) 32Tc = 1/2Fmax  Fmax = 1/(64Tc) Given Fclk=2Mhz  Tc= 0.5uS Fmax=31.5KHz

Aperture Time The amount of time needed by ADC to sample the analog input is known as the “aperture time.” In the 68HC11, 12 cycles are needed to convert Vin. If the input signal changes considerable during the sample, we will see Aperture Jitter, signal “noise”, or signal error due to the uncertainty of the input signal.

TPS Quiz