Application of the SIDECAR ASIC as the Detector Controller for ACS and the JWST Near-IR Instruments Markus Loose STScI Calibration Workshop July 22, 2010.

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Presentation transcript:

Application of the SIDECAR ASIC as the Detector Controller for ACS and the JWST Near-IR Instruments Markus Loose STScI Calibration Workshop July 22, 2010

Outline SIDECAR ASIC Architecture – Overview – Features – Current SIDECAR Missions Performance Aspects – Preamp/ADC Noise – Preamp offset drift – Reference/Bias voltage noise Conclusion Oct 15, 20092Scientific Detector Workshop, Garching, Germany

July 22, 2010STScI Calibration Workshop3 S ystem for I mage D igitization, E nhancement, C ontrol A nd R etrieval SIDECAR ASIC Architecture

SIDECAR ASIC Features July 22, 2010STScI Calibration Workshop4 36 analog input channels, each channel provides: – 500 kHz A/D conversion with 16 bit resolution – 10 MHz A/D conversion with 12 bit resolution – gain = 0 dB …. 27 dB in steps of 3 dB – optional low-pass filter with programmable cutoff – optional internal current source (as source follower load) 20 analog output channels, each channel provides: – programmable output voltage and driver strength – programmable current source or current sink – internal reference generation (bandgap or vdd) 32 digital I/O channels to generate clock patterns, each channel provides: – input / output / highohmic – selectable output driver strength and polarity – pattern generator (16 bit pattern) independent of microcontroller – programmable delay (1ns - 250µs) 16 bit low-power microprocessor core (single event upset proof) – responsible for timing generation and data processing – 16 kwords program memory (32 kByte) and 8 kwords data memory (16 kByte) – 36 kwords ADC data memory, 24 bit per word (108 kByte) – additional array processor for adding, shifting and multiplying on all 36 data channels in parallel (e.g. on-chip CDS, leaky memory or other data processing tasks)

“SIDECAR ASIC” Missions July 22, 2010STScI Calibration Workshop5 ACS (HST) in space NIRCam/NIRSpec/FGS (JWST) in development TIRS (LDCM) in development

Noise Reduction by Using Multiple ADC Channels July 22, 2010STScI Calibration Workshop6 1 ADC 2 ADCs 4 ADCs 6 ADCs 8 ADCs PreAmp inputs shorted to ground (lowest noise signal in order to be dominated by ADC noise) PreAmp gain set to 4 (12 dB) Noise measured by using multiple preamp and ADC channels in parallel (1, 2, 4, 6, and 8) Noise reduces almost as the square root of the number of channels used

Preamp Drift and Mitigation July 22, 2010STScI Calibration Workshop7 Data taken as 512 x 64 frames for efficiency, Gain = 4 Drift kTC row noise kTC removed (CCD mode) σ= 52 ADU σ= 2.6 ADU σ= 13.9 ADU

Bias Generator Noise July 22, 2010STScI Calibration Workshop8 Bias output 1 routed back into PreAmp PreAmp gain set to 22 (27 dB) Use 4 ADCs in parallel to reduce PreAmp & ADC noise Noise on bias without filtering is about 35µV (11.6 ADU) Noise can be reduced by RC filtering to less than 5µV Bias noise as a function of RC filter time constant PreAmp & ADC noise floor Unfiltered Noise of Bias Output 1 Filtered Noise of Bias Output 1 (t RC = 360 ms)

July 22, 2010STScI Calibration Workshop9 Noise Power Spectrum of the Bias Outputs FFT of temporal noise measurement with RC filter set to t RC = 3 µ s FFT of temporal noise measurement with RC filter set to t RC = 3 ms

July 22, 2010STScI Calibration Workshop10 FFT of temporal noise measurement with RC filter set to t RC = 360ms FFT of temporal noise measurement with grounded PreAmp inputs (i.e. noise floor) Noise Power Spectrum of the Bias Outputs, Part 2

1/F Noise in NIRSpec/JWST July 22, 2010STScI Calibration Workshop11 Traditional CDS Optimal CDS σ CDS ~ 18 e- rmsσ CDS ~ 8 e- rms

ACS 1/f Noise July 22, 2010STScI Calibration Workshop12

ACS 1/f Noise July 22, 2010STScI Calibration Workshop13 Bias Frame without correction (superbias subtracted) Bias Frame with correction (superbias subtracted)

Conclusion SIDECAR ASIC is a small, low power and highly programmable solution for operating scientific detectors Current performance limitations – Bias voltages exhibit high 1/f noise, even after filtering – ADC noise higher than ideal 16-bit ADC Methods for dealing with these limitations exist – Hardware: Filtering, Gain – ASIC firmware (assembly code): Averaging of channels – Post-processing: Correlated noise correction algorithms New version of SIDECAR ASIC currently in design – Improved bias generator with 5x lower noise – Reduced ADC noise July 22, 2010STScI Calibration Workshop14

First Image of the Repaired Advanced Camera for Surveys Barred Spiral Galaxy NGC 6217 Photographed on June 13 and July