Discussion #25 – ADCECEN 3011 Conversion Mosiah 5:2 2 And they all cried with one voice, saying: Yea, we believe all the words which though has spoken unto us; and also, we know of their surety and truth, because of the Spirit of the Lord Omnipotent, which as wrought a mighty change in us, or in our hearts, that we have more disposition to do evil, but to do good continually.

Discussion #25 – ADCECEN 3012 Lecture 25 –Analog to Digital Convertion (ADCs)

Discussion #25 – ADCECEN 3013 ADC/DAC Sensors are generally analog, but most signal processing devices (appliances, computers, etc.) are digital thus there must be a conversion Analog to digital (ADC) – coming into a device Digital to analog (DAC) – going out of a device Device ADCDAC Digital Analog Actuator Sensor

Discussion #25 – ADCECEN 301Discussion #24 – DAC4 ADC/DAC ADCDAC Digital Analog … … Sensors are generally analog, but most signal processing devices (appliances, computers, etc.) are digital thus there must be a conversion Analog to digital (ADC) – coming into a device Digital to analog (DAC) – going out of a device

Discussion #25 – ADCECEN 3015 Analog to Digital Converter (ADC) ADC: converts an analog voltage or current into a binary word Word length (n): the number of bits in the sequence of 1s and 0s representing an output EX: 0110 – 4-bit word length – 6-bit word length Binary word (B): a sequence of n 1s and 0s B = b n-1 b n-2 …b 2 b 1 b 0 EX: B = (n = 8) Note: many ADCs can only convert positive or negative values

Discussion #25 – ADCECEN 3016 Analog to Digital Converter (ADC) ADC: converts an analog voltage or current into a binary word Resolution δv: minimum step size by which the output voltage (or current) can increment Input voltage v a : the analog value represented by the binary word B EX: let n=4 (number of bits) v a = (2 3 ·b ·b ·b ·b 0 )δv Max input voltage v aMax : the maximum analog value EX: let n=4 (number of bits) v aMax = ( )δv = (2 n – 1) δv Example: δv = 1V, B = (n = 5) Find v aMax and v a v aMax = (2 n – 1) δv = (2 5 – 1) ∙ 1 = 31 v a = (2 4 ·b ·b ·b ·b ·b 0 )δv = (16 ·1 + 8·0 + 4·1 + 2·1 + 1·0) · 1 = ( ) = 22

Discussion #25 – ADC Op Amp Comparator An op amp without feedback is a binary comparator Rail-to-rail output swing Simple one-bit analog to digital converter – + vovo v+v+ v–v– v ref +–+– v input Positive power supply (+5V) Negative power supply (–5V) VS+VS+ VS–VS–

Discussion #25 – ADC Quantization Analog representation by a binary value results in quantization of the value v d b 3 b 2 b 1 b … Binary representation Quantized voltage … … v in (volts) v out (volts) Quantization error (v out -v in ) always non- positive for this case

Discussion #25 – ADCECEN 3019 Quantization (ADC/DAC) Quantization: The analog output (v a ) has a step-like appearance because of the discrete nature of a binary signal The resolution (coarseness of the “staircase”) can be adjusted by changing the word length (the number of bits) Approximated using 2-bits Approximated using 3-bits δvδv δvδv

Discussion #25 – ADCECEN Digital to Analog Converter (DAC) Comparison of an ADC and DAC – + +va–+va– R1R1 R n-2 R n-1 RFRF R0R0 v in b n-1 b n-2 b1b1 b0b0 DAC ADC Digital output – + v in – + – + – + – + – + Digital logic encoder +V R R R R R R R

Discussion #25 – ADC Types of ADCs Successive approximation Takes time, input must remain steady during conversion – + v in v ref DAC Register & Control Logic Clock Digital value output Conversion complete Start conversion comparator

Discussion #25 – ADC Types of ADCs Tracking ADC Input must remain steady during conversion Quicker than successive approximation type + – v in v ref DAC Clock Digital value output Up-down counter up down comparator

Discussion #25 – ADC Types of ADCs Flash ADC Fast (no sample-and-hold required) Complex 2 N comparators required Number of bits limited – + v in – + – + – + – + – + Digital logic encoder +V R R R R R R R

Discussion #25 – ADC Sample-and-hold ADC required constant input voltage during conversion. How do we guarantee this? Use sample-and-hold circuit Basic idea: store voltage on a capacitor, then hold during conversion Design caution: capacitor voltage can “droop” during hold – + v in – + v out Sample/ hold voltage follower (buffer) voltage follower (buffer) Storage capacitor

Discussion #25 – ADCECEN Analog to Digital Converter (ADC) Example 1: v in = 4.1V, Vref=5 V, N=4 bits Find Dout and the quantization error

Discussion #25 – ADC Multiplexing Time share expensive ADC between channels ADC has to run at higher rate Analog multiplexer Sample and hold Control logic ADC Clock Digital out trigger amplifier Analog in

Discussion #25 – ADC Time sampling ADC samples input voltage (generally) at regular intervals Time and voltage quantization … … v in (volts) v out (volts) 0 t V(t)

Discussion #25 – ADC ADC time sampling Ideally, ADC should take signal samples at evenly spaced intervals Can then use discrete Fourier transform (DFT) analysis Sample frequency = 1 / Sample interval Many inexpensive systems use variable spacing This can cause artifacts in measured signals, resulting in reduced accuracy May be OK for signals that change slowly with respect to the sample spacing

Discussion #25 – ADC Nyquist sampling When measuring a waveform that changes with time, it must be sampled at twice the highest frequency present to avoid aliasing ADC sampling interval = T s ADC sampling frequency = f s = 1/T s An analog low pass filter is generally included before the ADC to insure that no signal frequencies are higher than twice the sample rate The Nyquist sampling requirement means that the highest frequency sine wave in the signal has at least two samples per cycle of the sine wave or undesireable aliasing will result.

Discussion #25 – ADC Aliasing Aliasing occurs when the waveform is undersampled (sampled at too low a frequency). It makes a high frequency signal look like it is a low frequency waveform. Aliasing should always be avoided. The red waveform is undersampled at 1 Hz. The processor will think the samples (black dots) are from the blue waveform. The red signal is aliased into the blue signal.

Discussion #25 – ADCECEN Sample Frequency Example 1: T s = s What is the highest frequency that can be sampled without aliasing? What is the frequency of the low pass filter that should be included before the ADC? The lowpass filter cutoff frequency should be less than 500 Hz (usually by at least 10%)

Discussion #25 – ADC Schmitt Trigger Schmitt trigger circuit uses hysteresis to improve noise tolerance v out R1R1 v in R2R2 R3R3 v+v+ v–v– VS+VS+ VS–VS– VS+VS+ – + v out v in VS–VS– VS+VS+ V ref ΔVΔV 0 t v out t t ΔVΔVV ref Schmitt trigger Conventional comparator Noisy signal