Kristian Zarb Adami Pathfinders for the SKA: Nlog(N) vs. N 2 Imaging Instruments:

N log N Astronomy

In fact...  Japan designed the SKA in 1994  8x8 Images in 1994 with Waseda telescope  Extrapolating with Moore’s Law  (doubling every 18 months)  2016 is 1x10 6 antennas  Which is equivalent to SKA-phase-1

Remit of the talk  Science Justification for SKA 1 -Low  Science and Technical simulations towards implementation of the SKA  Physical Implementation on Medicina as a flexible DSP test-bed and a comparison between spatial-FFT and N 2 imaging  Industrial Engagement

SKA Phase-1 Specifications Memo 125

Sensitive (-ity) Issues.. [SKA Memo 100]

Roadmap to the SKA-lo N BW (16,32) (16,60) (1,768) (25,192) (400,50x2xNbeams) Super Terp LOFAR UK GMRT Medicina SKA-1 (32, 64) MWA-32 LOFAR (8,50x2xNbeams) LWA (78,100) (32, 1024) MWA-512 PAPER (100,128) MITEOR (25,16)

H1-Power Spectrum (z≈8) Theoretical 21-cm Power 150 MHz Power Spectrum from a (100,256) instrument Foregrounds suppressed by frequency/angle differencing

NlogN vs. N 2 LOFAR 2010 Super-Terp 2011 SKA-Phase 1 SKA-Phase 2

HI Power Spectra (SKA-Phase-II) Blue: HI > 10 8 Green: HI > 20’ Linear Bias = 1.0 Linear bias = 0.8 Co-moving Volume = (500MPc/h) 3

SKA 1 Low Layout 100km 200m

 Bandwidth 70 – 450 MHz (Instantaneous B/W 380 MHz)  ADC Sampling at 1 8-bit  Antenna Spacing ~ 2.6m  Array Configuration:  50 stations  11,200 antennas per station (~10,000)  Output beams of 2-bit real; 2-bit imag The numbers game (SKA 1 -low)

Numbers cont...  SKA-1 ~ 50 stations of 10,000 antennas each  Station diameter ≈ 200m  Station 70 MHz ≈ MHz ≈ 0.2 ○  N baselines = 5,000 (50^2/2 *4)  Input data rate to station 160 Tb/s (total data rate 8 Pb/s for the SKA-1 lo)  Output rate?  Assume 10 Tb/s off station = 100 x 100Gb/s fibres  Output beams 2+2 bits, ~100kHz channels (1.6Mbps per beam-channel)  6.25 million beam-channels – by DFT need 0.1 Pop/s ( channels)  Equalise sky coverage so N(f) ~f 2 – 100 beams in lowest (70 – 70.1 MHz) channel  100 sq deg instantaneous coverage.  Correlator has to do 1,000 baselines for each 1 kHz beam-channel  (for a total ~ 10 Pop/s)

Station Architecture

Station Layout Richard Armstrong – Tile Processor Tile Processor Tile Processor Tile Processor Station Processor Optical Fibre Copper

Hierarchical Architecture Antennas Multiply and add by weights Cross correlation of sub-arrays (for station calibration and ionospheric calibration) Hierarchical Beam Forming (tiles then station) Tile Level Weights Station Level Weights Direct Station Beam Forming Station Weights Sub-Station Cross-correlation (calibration)? Sub-Station Weights Tile level Electronic Calibration Field or Strong Source Calibration ~CAS-A Source & Polarisation Calibration Polarisation Calibration

Tile processor box RF in (coax) 16 x dual pol Multi-chip module Fibre: Data out Clock and control in Reg DC in

Tile Processor ADCADC ADCADC ADCADC ADCADC Coarse freq splitting 1 st Level Beamforming RFI Mitigation & 4-bit Quantisation Tile Processor Inputs: 16 dual-pol antennas 8-bit Coarse frequency splitting Into 4 channels Outputs: dual-pol 4-bit re/4-bit imag Output is optical Control and Calibration Interface

Space-Frequency Beamforming Time-delay beamforming is now an option… Dense mid-freq array: Antenna sep ~ 20cm Time step ~ 1ns ~ 30 cm Angle step > 45 deg Sparse low-freq array: Antenna sep ~2 m Time step ~ 1ns ~ 30 cm Angle step ~10 deg – less if interpolate Front end unit can combine space-freq beamforming in a single FIR-like structure Golden Rule: throw away redundant data before spending energy processing/transporting it

Station processor Optical- electro Heirarchical processor Electro- optical Multi-chip module M&C Optical- electro Heirarchical processor Electro- optical Multi-chip module M&C Optical- electro Heirarchical processor Electro- optical Multi-chip module M&C Optical- electro Heirarchical processor Electro- optical Multi-chip module M&C Optical- electro Heirarchical processor Electro- optical Multi-chip module M&C Clock & control

Station Processor 2 nd Level Beamforming 2 nd Level Channelisation Corner Turner Station Calibration and Correlator Inputs: 64-dual pol 1 st stage beams Outputs: selectable dual-pol 2-bit re/2-bit imag Channelisation to 4096 channels With a 1024 channeliser Station Calibration and station correlator Output is optical and correlator ready

Simulations

Multi-Level Beamforming  Split the problem to be hierarchical and parallel.  Station divided into tiles (can be logical).  Dump as much unwanted data as we can early on. Tile beam Station beams

Simple Beam Patterns 80 x 80 degrees: Station beam at (45, 87) degrees.Tile beam at zenith.

Visualisation of beams Elevation degrees 1000 MHz antennas, 256 tiles Station beams 0.05 degrees apart Tile beams 2 degrees apart 27 tile beams, station beams Run time: 5.67 seconds Station beams 0.20 degrees apart Tile beams 2 degrees apart 27 tile beams, 8005 station beams Run time: 2.18 seconds

Dynamic Range Simulation Courtesy: S. Schediwy & Danny Price This is the reason a correlator is required for a beamformer

Auto-power beam Peak power 0 dB Array station sparsed x3 Cross-power beam 3deg rotation Peak power -20dB Cross-power beam 30 deg rotation Peak power -50dB

Examples of Implementation

Introduction 564m 24 segments 640m 64 cylinders 32m dish Medicina Radio Telescopes BEST-2 BEST-3Lo

BEST-2 specs N cylinders8 N receivers32 Total collecting area m 2 Total effective area m 2 Central Freq.408 MHz Frequency BW16 MHz IF30MHz Longest baseline N/S E/W 70m 17.04m Primary FOV37.65 deg 2 Sensitivity / Antenna Gain K/Jy Aeff / Tsys m 2 /K Transit time at delta = 45 deg sec. Marco Bartolini, IRA - INAF

64- Channel ADC F - ROACH X - ROACH S - ROACH B - ROACH HOST - PC GPU Imaging & Calibration GPU Transient 1Gb-E 10 Gb-e Richard Griffin Jack PCI-X Jack Alessio Dickie OeRC Medicina Radio Telescopes

Medicina Backend: Spatial FFT Danny Price – Jack Hickish

Medicina Fringes…

Medicina Fringes (Cas. A.)

Cas. A. Image

Industrial Engagement It is NOT the intention of the SKA community to deliver 'finished' chip designs yet. Aiming for detailed device specifications ready to start prototype manufacture when NRE money available There are basic engineering processes that have to be done to enable meaningful sizing, cost & power estimation IP identification and development – potential industrial involvement Development of strategic technology partnerships ADC design IP macros for eg FFT, switch fabric Embedded controllers Non-packaged device mounting Identification of key architectural features Identify appropriate optimisation opportunities and trade-offs. Development of accurate models for cost and power analysis at the wider system level. Identify key interface 'Hot Spots' and apply effort accordingly

Industrial Engagement  Multi-Chip Module (One Chip to Rule them all!)  4 x 4 antenna array (currently) – easily extended to 8x8  Can also be used for Phased Array feeds for dishes  Current Chip RFI protection shows -57dB/m (in air) ADC FIR-FFT Processor Beam Combiner & Calibrator Optical I/O RF IN Optical OUT 16-8 bit 1GS/s 1024 channel splitter 16 element Beam combiner Optical Chip UWB RX 10mW/FFT 10mW/ channel 4mW/Beam ??

Requirement Specifications