Real-Time DSP Multiprocessor Implementation for Future Wireless Base-Station Receivers Bryan Jones, Sridhar Rajagopal, and Dr. Joseph Cavallaro.

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Presentation transcript:

Real-Time DSP Multiprocessor Implementation for Future Wireless Base-Station Receivers Bryan Jones, Sridhar Rajagopal, and Dr. Joseph Cavallaro

Wireless Information Applicance – RENE Home Area Wireless LAN High Speed Office Wireless LAN Outdoor CDMA Cellular Network

Home Area Wireless LAN Wireless Information Applicance – RENE High Speed Office Wireless LAN Outdoor CDMA Cellular Network

Wireless Information Appliance Challenges: Higher data rates Longer battery life (lower power signals) noise MAI reflections base station fading attenuation multipath

Wireless Information Appliance Solution: Advanced DS-CDMA joint multiuser channel estimation and detection Fixed-point friendly Focus on baseband processing Real-world: Asynchronous Fading channel Performance includes both estimation and detection

Outline Algorithms for joint estimation and detection Wireless testbed (Simulink + RealSync) Multiprocessor implementation Results and conclusions

As each bit arrives: Form cross- and auto-correlation matrices from windowed data Algorithms – channel estimation R bb, R br downdate update 0 (newest) L (oldest)Window index: … … Pilot bits or Detected bits Chips from antenna b r

As each bit arrives: Update channel estimate iteratively: becomes  controls convergence behavior. A contains both amplitude and delay information for each user. Algorithms – channel estimation

Algorithms – detection (CMF) Separate odd and even columns of channel estimate Form initial estimate of users’ bits via code-matched filtering Soft: Hard:

Form L, R, C matrices from channel estimate Improve estimate of users’ bits via parallel interference cancellation Algorithms – detection (PIC)

Outline Algorithms for joint estimation and detection Wireless testbed (Simulink + RealSync) Multiprocessor implementation Results and conclusions

Wireless testbed – Simulink Provide a rapid development / debug environment Generate data for a varieties of SNRs, users, spreading codes, channels Determine bit error rate

Wireless testbed – Simulink Joint estimation and detection runs on DSP, while data generation, analysis runs on host!

Wireless testbed – RealSync Simulink in Simulink out RealSync S-function PutMatrix(out)GetMatrix(in1, in2) Estimate, detect DSP

Outline Algorithms for joint estimation and detection Wireless testbed (Simulink + RealSync) Multiprocessor implementation Results and conclusions

Multiprocessor implementation Sundance multi-processor board with 3L Diamond multi-P OS Twin TI TMS320C6701 processors Twin Xilinx Virtex 300K gate FPGAs 3L software allows easy reconfiguration of programs, tasks among processors

Multiprocessor implementation Interprocessor communication via comm-ports (no shared 5MB/sec. Blocks during data transfer. Task partitioning: estimator on one processor, detector on the other. Goal: keep both processors maximally busy

Outline Algorithms for joint estimation and detection Wireless testbed (Simulink + RealSync) Multiprocessor implementation Results and conclusions

Results – static single proc.

Results – static single vs. dual

Results – tracking single vs. dual

Conclusions Performance measures should include channel estimation and detection time. Estimation and detection map well to a dual-processor implementation. “The right algorithms, the right tools… the real world”